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author | Sascha Hauer <s.hauer@pengutronix.de> | 2016-06-13 07:31:46 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-06-13 12:43:53 +0200 |
commit | 86186c232241b607f84cc266a6cda49160f44948 (patch) | |
tree | 286a87dae7f2d8c3eda5b8551fc9b5f4db726c45 /dts/Bindings/display/hisilicon/dw-dsi.txt | |
parent | 0cf29e11efa66ad4515c9391303406c725be2c7a (diff) | |
download | barebox-86186c232241b607f84cc266a6cda49160f44948.tar.gz barebox-86186c232241b607f84cc266a6cda49160f44948.tar.xz |
dts: update to v4.7-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/display/hisilicon/dw-dsi.txt')
-rw-r--r-- | dts/Bindings/display/hisilicon/dw-dsi.txt | 72 |
1 files changed, 72 insertions, 0 deletions
diff --git a/dts/Bindings/display/hisilicon/dw-dsi.txt b/dts/Bindings/display/hisilicon/dw-dsi.txt new file mode 100644 index 0000000000..d270bfe4e4 --- /dev/null +++ b/dts/Bindings/display/hisilicon/dw-dsi.txt @@ -0,0 +1,72 @@ +Device-Tree bindings for DesignWare DSI Host Controller v1.20a driver + +A DSI Host Controller resides in the middle of display controller and external +HDMI converter or panel. + +Required properties: +- compatible: value should be "hisilicon,hi6220-dsi". +- reg: physical base address and length of dsi controller's registers. +- clocks: contains APB clock phandle + clock-specifier pair. +- clock-names: should be "pclk". +- ports: contains DSI controller input and output sub port. + The input port connects to ADE output port with the reg value "0". + The output port with the reg value "1", it could connect to panel or + any other bridge endpoints. + See Documentation/devicetree/bindings/graph.txt for more device graph info. + +A example of HiKey board hi6220 SoC and board specific DT entry: +Example: + +SoC specific: + dsi: dsi@f4107800 { + compatible = "hisilicon,hi6220-dsi"; + reg = <0x0 0xf4107800 0x0 0x100>; + clocks = <&media_ctrl HI6220_DSI_PCLK>; + clock-names = "pclk"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* 0 for input port */ + port@0 { + reg = <0>; + dsi_in: endpoint { + remote-endpoint = <&ade_out>; + }; + }; + }; + }; + + +Board specific: + &dsi { + status = "ok"; + + ports { + /* 1 for output port */ + port@1 { + reg = <1>; + + dsi_out0: endpoint@0 { + remote-endpoint = <&adv7533_in>; + }; + }; + }; + }; + + &i2c2 { + ... + + adv7533: adv7533@39 { + ... + + port { + adv7533_in: endpoint { + remote-endpoint = <&dsi_out0>; + }; + }; + }; + }; + |