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author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-08-17 08:16:38 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-08-17 09:51:44 +0200 |
commit | 0c2e2b7d8fd795c24abc7bfd3752eb3e366155eb (patch) | |
tree | 21cddf4b49891b7df21cbe5e5dd358d4e44e031d /dts/Bindings/media/renesas,fdp1.txt | |
parent | 8ef08db9ad225acbf7326493cc586bb14fd917f5 (diff) | |
download | barebox-0c2e2b7d8fd795c24abc7bfd3752eb3e366155eb.tar.gz barebox-0c2e2b7d8fd795c24abc7bfd3752eb3e366155eb.tar.xz |
dts: update to v5.9-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/media/renesas,fdp1.txt')
-rw-r--r-- | dts/Bindings/media/renesas,fdp1.txt | 37 |
1 files changed, 0 insertions, 37 deletions
diff --git a/dts/Bindings/media/renesas,fdp1.txt b/dts/Bindings/media/renesas,fdp1.txt deleted file mode 100644 index 8dd1007bb5..0000000000 --- a/dts/Bindings/media/renesas,fdp1.txt +++ /dev/null @@ -1,37 +0,0 @@ -Renesas R-Car Fine Display Processor (FDP1) -------------------------------------------- - -The FDP1 is a de-interlacing module which converts interlaced video to -progressive video. It is capable of performing pixel format conversion between -YCbCr/YUV formats and RGB formats. Only YCbCr/YUV formats are supported as -an input to the module. - -Required properties: - - - compatible: must be "renesas,fdp1" - - reg: the register base and size for the device registers - - interrupts : interrupt specifier for the FDP1 instance - - clocks: reference to the functional clock - -Optional properties: - - - power-domains: reference to the power domain that the FDP1 belongs to, if - any. - - renesas,fcp: a phandle referencing the FCP that handles memory accesses - for the FDP1. Not needed on Gen2, mandatory on Gen3. - -Please refer to the binding documentation for the clock and/or power domain -providers for more details. - - -Device node example -------------------- - - fdp1@fe940000 { - compatible = "renesas,fdp1"; - reg = <0 0xfe940000 0 0x2400>; - interrupts = <GIC_SPI 262 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 119>; - power-domains = <&sysc R8A7795_PD_A3VP>; - renesas,fcp = <&fcpf0>; - }; |