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author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-06-17 22:16:07 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-06-19 09:41:51 +0200 |
commit | 9313920df6d3d55fbd03ce8ec1c0da9a10c29824 (patch) | |
tree | ef80d80abbaf46293b777ead52caddd9d5d97644 /dts/Bindings/media/renesas,vsp1.txt | |
parent | 83e875e1f45beffe399cff0ff6128e0fca9da168 (diff) | |
download | barebox-9313920df6d3d55fbd03ce8ec1c0da9a10c29824.tar.gz barebox-9313920df6d3d55fbd03ce8ec1c0da9a10c29824.tar.xz |
dts: update to v3.16-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/media/renesas,vsp1.txt')
-rw-r--r-- | dts/Bindings/media/renesas,vsp1.txt | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/dts/Bindings/media/renesas,vsp1.txt b/dts/Bindings/media/renesas,vsp1.txt new file mode 100644 index 0000000000..87fe08abf3 --- /dev/null +++ b/dts/Bindings/media/renesas,vsp1.txt @@ -0,0 +1,43 @@ +* Renesas VSP1 Video Processing Engine + +The VSP1 is a video processing engine that supports up-/down-scaling, alpha +blending, color space conversion and various other image processing features. +It can be found in the Renesas R-Car second generation SoCs. + +Required properties: + + - compatible: Must contain "renesas,vsp1" + + - reg: Base address and length of the registers block for the VSP1. + - interrupts: VSP1 interrupt specifier. + - clocks: A phandle + clock-specifier pair for the VSP1 functional clock. + + - renesas,#rpf: Number of Read Pixel Formatter (RPF) modules in the VSP1. + - renesas,#uds: Number of Up Down Scaler (UDS) modules in the VSP1. + - renesas,#wpf: Number of Write Pixel Formatter (WPF) modules in the VSP1. + + +Optional properties: + + - renesas,has-lif: Boolean, indicates that the LCD Interface (LIF) module is + available. + - renesas,has-lut: Boolean, indicates that the Look Up Table (LUT) module is + available. + - renesas,has-sru: Boolean, indicates that the Super Resolution Unit (SRU) + module is available. + + +Example: R8A7790 (R-Car H2) VSP1-S node + + vsp1@fe928000 { + compatible = "renesas,vsp1"; + reg = <0 0xfe928000 0 0x8000>; + interrupts = <0 267 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&mstp1_clks R8A7790_CLK_VSP1_S>; + + renesas,has-lut; + renesas,has-sru; + renesas,#rpf = <5>; + renesas,#uds = <3>; + renesas,#wpf = <4>; + }; |