summaryrefslogtreecommitdiffstats
path: root/dts/Bindings/mfd
diff options
context:
space:
mode:
authorLucas Stach <l.stach@pengutronix.de>2022-05-13 16:16:25 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2022-05-16 10:10:05 +0200
commit1e7d4ace64cc79d2a7940f818e594afd5b7a2469 (patch)
tree5d0ad671d1b23709f3175f4c2b014ed7a5d2d9d0 /dts/Bindings/mfd
parent0dcad8344b396cc02affc037437c0448b19716e9 (diff)
downloadbarebox-1e7d4ace64cc79d2a7940f818e594afd5b7a2469.tar.gz
barebox-1e7d4ace64cc79d2a7940f818e594afd5b7a2469.tar.xz
ARM: imx: esdctl: fix LPDDR4 size calculation
The DDRC only uses the DEVICE_CONFIG field for memory types other than LPDDR4. While LPDDR4 always has a bus width of x32, the script aid generates the value for a x16 bus, as this was apparently used for the controller validation. This resulted in the calculated DRAM size to be halved on boards with LPDDR4 memory. Fixes: d8d5778ee8c2 ("ARM: imx: Correct mem size calculation for 4/8/16/32 bit bus width") Signed-off-by: Lucas Stach <l.stach@pengutronix.de> Link: https://lore.barebox.org/20220513141625.1411217-1-l.stach@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/mfd')
0 files changed, 0 insertions, 0 deletions