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author | Sascha Hauer <s.hauer@pengutronix.de> | 2021-03-09 14:49:17 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-03-17 09:37:13 +0100 |
commit | f826d85b7ab0924d5bf1a5458c49e7f7d8207a23 (patch) | |
tree | dd6354e00da0aa143d1db6164e1a455dddb9b892 /dts/Bindings/mips | |
parent | 0e37f94fbe1bd189f35b3e1718549ec2f4a710ee (diff) | |
download | barebox-f826d85b7ab0924d5bf1a5458c49e7f7d8207a23.tar.gz barebox-f826d85b7ab0924d5bf1a5458c49e7f7d8207a23.tar.xz |
dts: update to v5.12-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/mips')
-rw-r--r-- | dts/Bindings/mips/lantiq/lantiq,cgu.yaml | 32 | ||||
-rw-r--r-- | dts/Bindings/mips/lantiq/lantiq,dma-xway.yaml | 32 | ||||
-rw-r--r-- | dts/Bindings/mips/lantiq/lantiq,ebu.yaml | 32 | ||||
-rw-r--r-- | dts/Bindings/mips/lantiq/lantiq,pmu.yaml | 32 | ||||
-rw-r--r-- | dts/Bindings/mips/realtek-rtl.yaml | 24 |
5 files changed, 152 insertions, 0 deletions
diff --git a/dts/Bindings/mips/lantiq/lantiq,cgu.yaml b/dts/Bindings/mips/lantiq/lantiq,cgu.yaml new file mode 100644 index 0000000000..d5805725be --- /dev/null +++ b/dts/Bindings/mips/lantiq/lantiq,cgu.yaml @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/lantiq/lantiq,cgu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lantiq Xway SoC series Clock Generation Unit (CGU) + +maintainers: + - John Crispin <john@phrozen.org> + +properties: + compatible: + items: + - enum: + - lantiq,cgu-xway + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + cgu@103000 { + compatible = "lantiq,cgu-xway"; + reg = <0x103000 0x1000>; + }; diff --git a/dts/Bindings/mips/lantiq/lantiq,dma-xway.yaml b/dts/Bindings/mips/lantiq/lantiq,dma-xway.yaml new file mode 100644 index 0000000000..40130fefa2 --- /dev/null +++ b/dts/Bindings/mips/lantiq/lantiq,dma-xway.yaml @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/lantiq/lantiq,dma-xway.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lantiq Xway SoCs DMA Controller DT bindings + +maintainers: + - John Crispin <john@phrozen.org> + +properties: + compatible: + items: + - enum: + - lantiq,dma-xway + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + dma@e104100 { + compatible = "lantiq,dma-xway"; + reg = <0xe104100 0x800>; + }; diff --git a/dts/Bindings/mips/lantiq/lantiq,ebu.yaml b/dts/Bindings/mips/lantiq/lantiq,ebu.yaml new file mode 100644 index 0000000000..0fada1f085 --- /dev/null +++ b/dts/Bindings/mips/lantiq/lantiq,ebu.yaml @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/lantiq/lantiq,ebu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lantiq Xway SoC series External Bus Unit (EBU) + +maintainers: + - John Crispin <john@phrozen.org> + +properties: + compatible: + items: + - enum: + - lantiq,ebu-xway + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + ebu@105300 { + compatible = "lantiq,ebu-xway"; + reg = <0x105300 0x100>; + }; diff --git a/dts/Bindings/mips/lantiq/lantiq,pmu.yaml b/dts/Bindings/mips/lantiq/lantiq,pmu.yaml new file mode 100644 index 0000000000..4982b458ac --- /dev/null +++ b/dts/Bindings/mips/lantiq/lantiq,pmu.yaml @@ -0,0 +1,32 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/lantiq/lantiq,pmu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Lantiq Xway SoC series Power Management Unit (PMU) + +maintainers: + - John Crispin <john@phrozen.org> + +properties: + compatible: + items: + - enum: + - lantiq,pmu-xway + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + pmu@102000 { + compatible = "lantiq,pmu-xway"; + reg = <0x102000 0x1000>; + }; diff --git a/dts/Bindings/mips/realtek-rtl.yaml b/dts/Bindings/mips/realtek-rtl.yaml new file mode 100644 index 0000000000..aadff8ce0f --- /dev/null +++ b/dts/Bindings/mips/realtek-rtl.yaml @@ -0,0 +1,24 @@ +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mips/realtek-rtl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek RTL83xx/93xx SoC series device tree bindings + +maintainers: + - Bert Vermeulen <bert@biot.com> + - Sander Vanheule <sander@svanheule.net> + +properties: + $nodename: + const: "/" + compatible: + oneOf: + # RTL8382-based boards + - items: + - enum: + - cisco,sg220-26 + - const: realtek,rtl8382-soc + +additionalProperties: true |