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authorSascha Hauer <s.hauer@pengutronix.de>2017-03-10 08:56:15 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2017-03-10 08:56:15 +0100
commit957bb6b6bcebc4c36f5f284dfb58d489e81016c6 (patch)
tree593d098617017987daaf8ce339e0eb29ea09fdde /dts/Bindings/mtd/cortina,gemini-flash.txt
parentcc2392cf4f2d5208be427e9ffdeafba192f05cbe (diff)
downloadbarebox-957bb6b6bcebc4c36f5f284dfb58d489e81016c6.tar.gz
barebox-957bb6b6bcebc4c36f5f284dfb58d489e81016c6.tar.xz
dts: update to v4.11-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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+Flash device on Cortina Systems Gemini SoC
+
+This flash is regular CFI compatible (Intel or AMD extended) flash chips with
+some special bits that can be controlled by the machine's system controller.
+
+Required properties:
+- compatible : must be "cortina,gemini-flash", "cfi-flash";
+- reg : memory address for the flash chip
+- syscon : must be a phandle to the system controller
+- bank-width : width in bytes of flash interface, should be <2>
+
+For the rest of the properties, see mtd-physmap.txt.
+
+The device tree may optionally contain sub-nodes describing partitions of the
+address space. See partition.txt for more detail.
+
+Example:
+
+flash@30000000 {
+ compatible = "cortina,gemini-flash", "cfi-flash";
+ reg = <0x30000000 0x01000000>;
+ syscon = <&syscon>;
+ bank-width = <2>;
+};