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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2021-10-04 16:10:53 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-10-05 13:50:03 +0200 |
| commit | 618948e4e5b399295bbe56bfb30891790cae9232 (patch) | |
| tree | 15b1424ce28f92fe546189d82b1f4d6258db5333 /dts/Bindings/pci/axis,artpec6-pcie.txt | |
| parent | a53e3c4e166e82e6abd8528c2dd1f91639407737 (diff) | |
| download | barebox-618948e4e5b399295bbe56bfb30891790cae9232.tar.gz barebox-618948e4e5b399295bbe56bfb30891790cae9232.tar.xz | |
dts: update to v5.15-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/pci/axis,artpec6-pcie.txt')
| -rw-r--r-- | dts/Bindings/pci/axis,artpec6-pcie.txt | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/dts/Bindings/pci/axis,artpec6-pcie.txt b/dts/Bindings/pci/axis,artpec6-pcie.txt index 979dc7b6cf..cc6dcdb676 100644 --- a/dts/Bindings/pci/axis,artpec6-pcie.txt +++ b/dts/Bindings/pci/axis,artpec6-pcie.txt @@ -1,7 +1,7 @@ * Axis ARTPEC-6 PCIe interface This PCIe host controller is based on the Synopsys DesignWare PCIe IP -and thus inherits all the common properties defined in designware-pcie.txt. +and thus inherits all the common properties defined in snps,dw-pcie.yaml. Required properties: - compatible: "axis,artpec6-pcie", "snps,dw-pcie" for ARTPEC-6 in RC mode; |