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author | Sascha Hauer <s.hauer@pengutronix.de> | 2019-06-05 00:06:30 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-06-11 09:11:11 +0200 |
commit | 796af3473b8222bcd89aa63e9886c355a6baf95d (patch) | |
tree | ad357b2756bda409b46747faaaf57a0ffd003c9c /dts/Bindings/pci/designware-pcie.txt | |
parent | 649b9ebcf53d697277bcdb01334dbcd563a33aa8 (diff) | |
download | barebox-796af3473b8222bcd89aa63e9886c355a6baf95d.tar.gz barebox-796af3473b8222bcd89aa63e9886c355a6baf95d.tar.xz |
dts: update to v5.2-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/pci/designware-pcie.txt')
-rw-r--r-- | dts/Bindings/pci/designware-pcie.txt | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/dts/Bindings/pci/designware-pcie.txt b/dts/Bindings/pci/designware-pcie.txt index c124f9bc11..5561a1c060 100644 --- a/dts/Bindings/pci/designware-pcie.txt +++ b/dts/Bindings/pci/designware-pcie.txt @@ -4,8 +4,11 @@ Required properties: - compatible: "snps,dw-pcie" for RC mode; "snps,dw-pcie-ep" for EP mode; -- reg: Should contain the configuration address space. -- reg-names: Must be "config" for the PCIe configuration space. +- reg: For designware cores version < 4.80 contains the configuration + address space. For designware core version >= 4.80, contains + the configuration and ATU address space +- reg-names: Must be "config" for the PCIe configuration space and "atu" for + the ATU address space. (The old way of getting the configuration address space from "ranges" is deprecated and should be avoided.) - num-lanes: number of lanes to use |