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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-06-06 08:07:28 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-06-06 08:07:28 +0200 |
| commit | bb2de9a333d17bb1b048ad208002501226b83f03 (patch) | |
| tree | 8ef2e876ba43af235c45cb2280885e9c67ba5548 /dts/Bindings/pci/fsl,imx6q-pcie.txt | |
| parent | 79e6629b02fb3a296b5dc70f16dec0f8d415ccf8 (diff) | |
| download | barebox-bb2de9a333d17bb1b048ad208002501226b83f03.tar.gz barebox-bb2de9a333d17bb1b048ad208002501226b83f03.tar.xz | |
dts: update to v4.12-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/pci/fsl,imx6q-pcie.txt')
| -rw-r--r-- | dts/Bindings/pci/fsl,imx6q-pcie.txt | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/dts/Bindings/pci/fsl,imx6q-pcie.txt b/dts/Bindings/pci/fsl,imx6q-pcie.txt index 83aeb1f5a6..e3d5680875 100644 --- a/dts/Bindings/pci/fsl,imx6q-pcie.txt +++ b/dts/Bindings/pci/fsl,imx6q-pcie.txt @@ -4,7 +4,11 @@ This PCIe host controller is based on the Synopsis Designware PCIe IP and thus inherits all the common properties defined in designware-pcie.txt. Required properties: -- compatible: "fsl,imx6q-pcie", "fsl,imx6sx-pcie", "fsl,imx6qp-pcie" +- compatible: + - "fsl,imx6q-pcie" + - "fsl,imx6sx-pcie", + - "fsl,imx6qp-pcie" + - "fsl,imx7d-pcie" - reg: base address and length of the PCIe controller - interrupts: A list of interrupt outputs of the controller. Must contain an entry for each entry in the interrupt-names property. @@ -34,6 +38,14 @@ Additional required properties for imx6sx-pcie: - clock names: Must include the following additional entries: - "pcie_inbound_axi" +Additional required properties for imx7d-pcie: +- power-domains: Must be set to a phandle pointing to PCIE_PHY power domain +- resets: Must contain phandles to PCIe-related reset lines exposed by SRC + IP block +- reset-names: Must contain the following entires: + - "pciephy" + - "apps" + Example: pcie@0x01000000 { |