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author | Sascha Hauer <s.hauer@pengutronix.de> | 2016-02-03 10:25:36 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-02-04 08:40:36 +0100 |
commit | 0ff58575c9d66f660886387c2e68d8c5c724e87b (patch) | |
tree | 4a889d1478da83ae46db96f5c049872cdb90eeb6 /dts/Bindings/pci/hisilicon-pcie.txt | |
parent | a0da52f83c36a81984e0fca4b75d522b955df267 (diff) | |
download | barebox-0ff58575c9d66f660886387c2e68d8c5c724e87b.tar.gz barebox-0ff58575c9d66f660886387c2e68d8c5c724e87b.tar.xz |
dts: update to v4.5-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/pci/hisilicon-pcie.txt')
-rw-r--r-- | dts/Bindings/pci/hisilicon-pcie.txt | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/dts/Bindings/pci/hisilicon-pcie.txt b/dts/Bindings/pci/hisilicon-pcie.txt index 17c6ed9c60..b721beacfe 100644 --- a/dts/Bindings/pci/hisilicon-pcie.txt +++ b/dts/Bindings/pci/hisilicon-pcie.txt @@ -1,4 +1,4 @@ -HiSilicon PCIe host bridge DT description +HiSilicon Hip05 and Hip06 PCIe host bridge DT description HiSilicon PCIe host controller is based on Designware PCI core. It shares common functions with PCIe Designware core driver and inherits @@ -7,8 +7,8 @@ Documentation/devicetree/bindings/pci/designware-pci.txt. Additional properties are described here: -Required properties: -- compatible: Should contain "hisilicon,hip05-pcie". +Required properties +- compatible: Should contain "hisilicon,hip05-pcie" or "hisilicon,hip06-pcie". - reg: Should contain rc_dbi, config registers location and length. - reg-names: Must include the following entries: "rc_dbi": controller configuration registers; @@ -20,7 +20,7 @@ Optional properties: - status: Either "ok" or "disabled". - dma-coherent: Present if DMA operations are coherent. -Example: +Hip05 Example (note that Hip06 is the same except compatible): pcie@0xb0080000 { compatible = "hisilicon,hip05-pcie", "snps,dw-pcie"; reg = <0 0xb0080000 0 0x10000>, <0x220 0x00000000 0 0x2000>; |