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author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-09-21 14:06:13 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-09-21 14:06:13 +0200 |
commit | f16050f80b317dbcafa377f0eb78681d7ea3f208 (patch) | |
tree | 5c11fa31f9d39f016136d77c9cd0dcb020c81027 /dts/Bindings/pci | |
parent | 36305384db0071d39412d87e50623197b563163a (diff) | |
download | barebox-f16050f80b317dbcafa377f0eb78681d7ea3f208.tar.gz barebox-f16050f80b317dbcafa377f0eb78681d7ea3f208.tar.xz |
dts: update to v5.9-rc2
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/pci')
-rw-r--r-- | dts/Bindings/pci/intel-gw-pcie.yaml | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/dts/Bindings/pci/intel-gw-pcie.yaml b/dts/Bindings/pci/intel-gw-pcie.yaml index 64b2c64ca8..a1e2be737e 100644 --- a/dts/Bindings/pci/intel-gw-pcie.yaml +++ b/dts/Bindings/pci/intel-gw-pcie.yaml @@ -9,6 +9,14 @@ title: PCIe RC controller on Intel Gateway SoCs maintainers: - Dilip Kota <eswara.kota@linux.intel.com> +select: + properties: + compatible: + contains: + const: intel,lgm-pcie + required: + - compatible + properties: compatible: items: |