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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-06-23 12:14:59 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-07-05 20:49:06 +0200 |
| commit | abef60363d8ecac66e45853f328afa8eeb9e00fd (patch) | |
| tree | c7d6f1dcf0ef5154b9182da86f1acad048cb7da1 /dts/Bindings/phy/qcom,qusb2-phy.yaml | |
| parent | e307bc559a2830b7f695150212ea1b26cdca69fb (diff) | |
| download | barebox-abef60363d8ecac66e45853f328afa8eeb9e00fd.tar.gz barebox-abef60363d8ecac66e45853f328afa8eeb9e00fd.tar.xz | |
dts: update to v5.8-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/phy/qcom,qusb2-phy.yaml')
| -rw-r--r-- | dts/Bindings/phy/qcom,qusb2-phy.yaml | 65 |
1 files changed, 29 insertions, 36 deletions
diff --git a/dts/Bindings/phy/qcom,qusb2-phy.yaml b/dts/Bindings/phy/qcom,qusb2-phy.yaml index f8bd28ff31..b5a6195de7 100644 --- a/dts/Bindings/phy/qcom,qusb2-phy.yaml +++ b/dts/Bindings/phy/qcom,qusb2-phy.yaml @@ -83,31 +83,28 @@ then: It is a 6 bit value that specifies offset to be added to PHY refgen RESCODE via IMP_CTRL1 register. It is a PHY tuning parameter that may vary for different boards of same SOC. - allOf: - - $ref: /schemas/types.yaml#/definitions/uint32 - - minimum: 0 - maximum: 63 - default: 0 + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 63 + default: 0 qcom,bias-ctrl-value: description: It is a 6 bit value that specifies bias-ctrl-value. It is a PHY tuning parameter that may vary for different boards of same SOC. - allOf: - - $ref: /schemas/types.yaml#/definitions/uint32 - - minimum: 0 - maximum: 63 - default: 32 + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 63 + default: 32 qcom,charge-ctrl-value: - description: + description: It is a 2 bit value that specifies charge-ctrl-value. It is a PHY tuning parameter that may vary for different boards of same SOC. - allOf: - - $ref: /schemas/types.yaml#/definitions/uint32 - - minimum: 0 - maximum: 3 - default: 0 + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3 + default: 0 qcom,hstx-trim-value: description: @@ -115,22 +112,20 @@ then: output current. Possible range is - 15mA to 24mA (stepsize of 600 uA). See dt-bindings/phy/phy-qcom-qusb2.h for applicable values. - allOf: - - $ref: /schemas/types.yaml#/definitions/uint32 - - minimum: 0 - maximum: 15 - default: 3 + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 15 + default: 3 qcom,preemphasis-level: description: It is a 2 bit value that specifies pre-emphasis level. Possible range is 0 to 15% (stepsize of 5%). See dt-bindings/phy/phy-qcom-qusb2.h for applicable values. - allOf: - - $ref: /schemas/types.yaml#/definitions/uint32 - - minimum: 0 - maximum: 3 - default: 0 + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3 + default: 2 qcom,preemphasis-width: description: @@ -138,21 +133,19 @@ then: pre-emphasis (specified using qcom,preemphasis-level) must be in effect. Duration could be half-bit of full-bit. See dt-bindings/phy/phy-qcom-qusb2.h for applicable values. - allOf: - - $ref: /schemas/types.yaml#/definitions/uint32 - - minimum: 0 - maximum: 1 - default: 0 + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 1 + default: 0 qcom,hsdisc-trim-value: description: It is a 2 bit value tuning parameter that control disconnect threshold and may vary for different boards of same SOC. - allOf: - - $ref: /schemas/types.yaml#/definitions/uint32 - - minimum: 0 - maximum: 3 - default: 1 + $ref: /schemas/types.yaml#/definitions/uint32 + minimum: 0 + maximum: 3 + default: 0 required: - compatible |