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author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-04-07 09:03:10 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-04-07 09:03:10 +0200 |
commit | b1d6f8a4fcc708a35ddde3221aa54ad1c07b715e (patch) | |
tree | 801775459e14375ac3d87de985c07b13734723c8 /dts/Bindings/phy | |
parent | b8fa004c500cf52ac92004134c24f5c051b82e7d (diff) | |
download | barebox-b1d6f8a4fcc708a35ddde3221aa54ad1c07b715e.tar.gz barebox-b1d6f8a4fcc708a35ddde3221aa54ad1c07b715e.tar.xz |
dts: update to v4.11-rc4
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/phy')
-rw-r--r-- | dts/Bindings/phy/brcm,nsp-usb3-phy.txt | 39 |
1 files changed, 0 insertions, 39 deletions
diff --git a/dts/Bindings/phy/brcm,nsp-usb3-phy.txt b/dts/Bindings/phy/brcm,nsp-usb3-phy.txt deleted file mode 100644 index e68ae5dec9..0000000000 --- a/dts/Bindings/phy/brcm,nsp-usb3-phy.txt +++ /dev/null @@ -1,39 +0,0 @@ -Broadcom USB3 phy binding for northstar plus SoC -The USB3 phy is internal to the SoC and is accessed using mdio interface. - -Required mdio bus properties: -- reg: Should be 0x0 for SoC internal USB3 phy -- #address-cells: must be 1 -- #size-cells: must be 0 - -Required USB3 PHY properties: -- compatible: should be "brcm,nsp-usb3-phy" -- reg: USB3 Phy address on SoC internal MDIO bus and it should be 0x10. -- usb3-ctrl-syscon: handler of syscon node defining physical address - of usb3 control register. -- #phy-cells: must be 0 - -Required usb3 control properties: -- compatible: should be "brcm,nsp-usb3-ctrl" -- reg: offset and length of the control registers - -Example: - - mdio@0 { - reg = <0x0>; - #address-cells = <1>; - #size-cells = <0>; - - usb3_phy: usb-phy@10 { - compatible = "brcm,nsp-usb3-phy"; - reg = <0x10>; - usb3-ctrl-syscon = <&usb3_ctrl>; - #phy-cells = <0>; - status = "disabled"; - }; - }; - - usb3_ctrl: syscon@104408 { - compatible = "brcm,nsp-usb3-ctrl", "syscon"; - reg = <0x104408 0x3fc>; - }; |