dts: update to v5.9-rc1

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

7 files changed, 254 insertions, 225 deletions

diff --git a/dts/Bindings/reset/fsl,imx-src.txt b/dts/Bindings/reset/fsl,imx-src.txt
deleted file mode 100644
index 6ed79e6024..0000000000
--- a/dts/Bindings/reset/fsl,imx-src.txt
+++ /dev/null
@@ -1,49 +0,0 @@
-Freescale i.MX System Reset Controller
-======================================
-
-Please also refer to reset.txt in this directory for common reset
-controller binding usage.
-
-Required properties:
-- compatible: Should be "fsl,<chip>-src"
-- reg: should be register base and length as documented in the
-  datasheet
-- interrupts: Should contain SRC interrupt and CPU WDOG interrupt,
-  in this order.
-- #reset-cells: 1, see below
-
-example:
-
-src: src@20d8000 {
-        compatible = "fsl,imx6q-src";
-        reg = <0x020d8000 0x4000>;
-        interrupts = <0 91 0x04 0 96 0x04>;
-        #reset-cells = <1>;
-};
-
-Specifying reset lines connected to IP modules
-==============================================
-
-The system reset controller can be used to reset the GPU, VPU,
-IPU, and OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device
-nodes should specify the reset line on the SRC in their resets
-property, containing a phandle to the SRC device node and a
-RESET_INDEX specifying which module to reset, as described in
-reset.txt
-
-example:
-
-        ipu1: ipu@2400000 {
-                resets = <&src 2>;
-        };
-        ipu2: ipu@2800000 {
-                resets = <&src 4>;
-        };
-
-The following RESET_INDEX values are valid for i.MX5:
-GPU_RESET     0
-VPU_RESET     1
-IPU1_RESET    2
-OPEN_VG_RESET 3
-The following additional RESET_INDEX value is valid for i.MX6:
-IPU2_RESET    4
diff --git a/dts/Bindings/reset/fsl,imx-src.yaml b/dts/Bindings/reset/fsl,imx-src.yaml
new file mode 100644
index 0000000000..27c5e34a3a
--- /dev/null
+++ b/dts/Bindings/reset/fsl,imx-src.yaml
@@ -0,0 +1,82 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/fsl,imx-src.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX System Reset Controller
+
+maintainers:
+  - Philipp Zabel <p.zabel@pengutronix.de>
+
+description: |
+  The system reset controller can be used to reset the GPU, VPU,
+  IPU, and OpenVG IP modules on i.MX5 and i.MX6 ICs. Those device
+  nodes should specify the reset line on the SRC in their resets
+  property, containing a phandle to the SRC device node and a
+  RESET_INDEX specifying which module to reset, as described in
+  reset.txt
+
+  The following RESET_INDEX values are valid for i.MX5:
+    GPU_RESET     0
+    VPU_RESET     1
+    IPU1_RESET    2
+    OPEN_VG_RESET 3
+  The following additional RESET_INDEX value is valid for i.MX6:
+    IPU2_RESET    4
+
+properties:
+  compatible:
+    oneOf:
+      - const: "fsl,imx51-src"
+      - items:
+          - const: "fsl,imx50-src"
+          - const: "fsl,imx51-src"
+      - items:
+          - const: "fsl,imx53-src"
+          - const: "fsl,imx51-src"
+      - items:
+          - const: "fsl,imx6q-src"
+          - const: "fsl,imx51-src"
+      - items:
+          - const: "fsl,imx6sx-src"
+          - const: "fsl,imx51-src"
+      - items:
+          - const: "fsl,imx6sl-src"
+          - const: "fsl,imx51-src"
+      - items:
+          - const: "fsl,imx6ul-src"
+          - const: "fsl,imx51-src"
+      - items:
+          - const: "fsl,imx6sll-src"
+          - const: "fsl,imx51-src"
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    items:
+      - description: SRC interrupt
+      - description: CPU WDOG interrupts out of SRC
+    minItems: 1
+    maxItems: 2
+
+  '#reset-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    reset-controller@73fd0000 {
+        compatible = "fsl,imx51-src";
+        reg = <0x73fd0000 0x4000>;
+        interrupts = <75>;
+        #reset-cells = <1>;
+    };
diff --git a/dts/Bindings/reset/fsl,imx7-src.txt b/dts/Bindings/reset/fsl,imx7-src.txt
deleted file mode 100644
index e10502d915..0000000000
--- a/dts/Bindings/reset/fsl,imx7-src.txt
+++ /dev/null
@@ -1,56 +0,0 @@
-Freescale i.MX7 System Reset Controller
-======================================
-
-Please also refer to reset.txt in this directory for common reset
-controller binding usage.
-
-Required properties:
-- compatible:
-	- For i.MX7 SoCs should be "fsl,imx7d-src", "syscon"
-	- For i.MX8MQ SoCs should be "fsl,imx8mq-src", "syscon"
-	- For i.MX8MM SoCs should be "fsl,imx8mm-src", "fsl,imx8mq-src", "syscon"
-	- For i.MX8MN SoCs should be "fsl,imx8mn-src", "fsl,imx8mq-src", "syscon"
-	- For i.MX8MP SoCs should be "fsl,imx8mp-src", "syscon"
-- reg: should be register base and length as documented in the
-  datasheet
-- interrupts: Should contain SRC interrupt
-- #reset-cells: 1, see below
-
-example:
-
-src: reset-controller@30390000 {
-     compatible = "fsl,imx7d-src", "syscon";
-     reg = <0x30390000 0x2000>;
-     interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
-     #reset-cells = <1>;
-};
-
-
-Specifying reset lines connected to IP modules
-==============================================
-
-The system reset controller can be used to reset various set of
-peripherals. Device nodes that need access to reset lines should
-specify them as a reset phandle in their corresponding node as
-specified in reset.txt.
-
-Example:
-
-	pcie: pcie@33800000 {
-
-		...
-
-		resets = <&src IMX7_RESET_PCIEPHY>,
-			 <&src IMX7_RESET_PCIE_CTRL_APPS_EN>;
-		reset-names = "pciephy", "apps";
-
-		...
-        };
-
-
-For list of all valid reset indices see
-<dt-bindings/reset/imx7-reset.h> for i.MX7,
-<dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ and
-<dt-bindings/reset/imx8mq-reset.h> for i.MX8MM and
-<dt-bindings/reset/imx8mq-reset.h> for i.MX8MN and
-<dt-bindings/reset/imx8mp-reset.h> for i.MX8MP
diff --git a/dts/Bindings/reset/fsl,imx7-src.yaml b/dts/Bindings/reset/fsl,imx7-src.yaml
new file mode 100644
index 0000000000..569cd3bd3a
--- /dev/null
+++ b/dts/Bindings/reset/fsl,imx7-src.yaml
@@ -0,0 +1,58 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/fsl,imx7-src.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Freescale i.MX7 System Reset Controller
+
+maintainers:
+  - Andrey Smirnov <andrew.smirnov@gmail.com>
+
+description: |
+  The system reset controller can be used to reset various set of
+  peripherals. Device nodes that need access to reset lines should
+  specify them as a reset phandle in their corresponding node as
+  specified in reset.txt.
+
+  For list of all valid reset indices see
+    <dt-bindings/reset/imx7-reset.h> for i.MX7,
+    <dt-bindings/reset/imx8mq-reset.h> for i.MX8MQ, i.MX8MM and i.MX8MN,
+    <dt-bindings/reset/imx8mp-reset.h> for i.MX8MP.
+
+properties:
+  compatible:
+    items:
+      - enum:
+          - fsl,imx7d-src
+          - fsl,imx8mq-src
+          - fsl,imx8mp-src
+      - const: syscon
+
+  reg:
+    maxItems: 1
+
+  interrupts:
+    maxItems: 1
+
+  '#reset-cells':
+    const: 1
+
+required:
+  - compatible
+  - reg
+  - interrupts
+  - '#reset-cells'
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/interrupt-controller/arm-gic.h>
+
+    reset-controller@30390000 {
+        compatible = "fsl,imx7d-src", "syscon";
+        reg = <0x30390000 0x2000>;
+        interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
+        #reset-cells = <1>;
+    };
diff --git a/dts/Bindings/reset/renesas,rst.yaml b/dts/Bindings/reset/renesas,rst.yaml
index 4c2b429ac7..2849ce4570 100644
--- a/dts/Bindings/reset/renesas,rst.yaml
+++ b/dts/Bindings/reset/renesas,rst.yaml
@@ -31,6 +31,7 @@ properties:
       - renesas,r8a774a1-rst      # RZ/G2M
       - renesas,r8a774b1-rst      # RZ/G2N
       - renesas,r8a774c0-rst      # RZ/G2E
+      - renesas,r8a774e1-rst      # RZ/G2H
       - renesas,r8a7778-reset-wdt # R-Car M1A
       - renesas,r8a7779-reset-wdt # R-Car H1
       - renesas,r8a7790-rst       # R-Car H2
diff --git a/dts/Bindings/reset/socionext,uniphier-reset.yaml b/dts/Bindings/reset/socionext,uniphier-reset.yaml
new file mode 100644
index 0000000000..4c9b0ebf68
--- /dev/null
+++ b/dts/Bindings/reset/socionext,uniphier-reset.yaml
@@ -0,0 +1,112 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/socionext,uniphier-reset.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: UniPhier reset controller
+
+maintainers:
+  - Masahiro Yamada <yamada.masahiro@socionext.com>
+
+properties:
+  compatible:
+    oneOf:
+      - description: System reset
+        enum:
+          - socionext,uniphier-ld4-reset
+          - socionext,uniphier-pro4-reset
+          - socionext,uniphier-sld8-reset
+          - socionext,uniphier-pro5-reset
+          - socionext,uniphier-pxs2-reset
+          - socionext,uniphier-ld6b-reset
+          - socionext,uniphier-ld11-reset
+          - socionext,uniphier-ld20-reset
+          - socionext,uniphier-pxs3-reset
+      - description: Media I/O (MIO) reset, SD reset
+        enum:
+          - socionext,uniphier-ld4-mio-reset
+          - socionext,uniphier-pro4-mio-reset
+          - socionext,uniphier-sld8-mio-reset
+          - socionext,uniphier-pro5-sd-reset
+          - socionext,uniphier-pxs2-sd-reset
+          - socionext,uniphier-ld11-mio-reset
+          - socionext,uniphier-ld11-sd-reset
+          - socionext,uniphier-ld20-sd-reset
+          - socionext,uniphier-pxs3-sd-reset
+      - description: Peripheral reset
+        enum:
+          - socionext,uniphier-ld4-peri-reset
+          - socionext,uniphier-pro4-peri-reset
+          - socionext,uniphier-sld8-peri-reset
+          - socionext,uniphier-pro5-peri-reset
+          - socionext,uniphier-pxs2-peri-reset
+          - socionext,uniphier-ld11-peri-reset
+          - socionext,uniphier-ld20-peri-reset
+          - socionext,uniphier-pxs3-peri-reset
+      - description: Analog signal amplifier reset
+        enum:
+          - socionext,uniphier-ld11-adamv-reset
+          - socionext,uniphier-ld20-adamv-reset
+
+  "#reset-cells":
+    const: 1
+
+additionalProperties: false
+
+required:
+  - compatible
+  - "#reset-cells"
+
+examples:
+  - |
+    sysctrl@61840000 {
+        compatible = "socionext,uniphier-sysctrl", "simple-mfd", "syscon";
+        reg = <0x61840000 0x4000>;
+
+        reset {
+            compatible = "socionext,uniphier-ld11-reset";
+            #reset-cells = <1>;
+        };
+
+        // other nodes ...
+    };
+
+  - |
+    mioctrl@59810000 {
+        compatible = "socionext,uniphier-mioctrl", "simple-mfd", "syscon";
+        reg = <0x59810000 0x800>;
+
+        reset {
+            compatible = "socionext,uniphier-ld11-mio-reset";
+            #reset-cells = <1>;
+        };
+
+        // other nodes ...
+    };
+
+  - |
+    perictrl@59820000 {
+        compatible = "socionext,uniphier-perictrl", "simple-mfd", "syscon";
+        reg = <0x59820000 0x200>;
+
+        reset {
+            compatible = "socionext,uniphier-ld11-peri-reset";
+            #reset-cells = <1>;
+        };
+
+        // other nodes ...
+    };
+
+  - |
+    adamv@57920000 {
+        compatible = "socionext,uniphier-ld11-adamv", "simple-mfd", "syscon";
+        reg = <0x57920000 0x1000>;
+
+        reset {
+            compatible = "socionext,uniphier-ld11-adamv-reset";
+            #reset-cells = <1>;
+        };
+
+        // other nodes ...
+    };
diff --git a/dts/Bindings/reset/uniphier-reset.txt b/dts/Bindings/reset/uniphier-reset.txt
index e320a8cc9e..88e06e5e8d 100644
--- a/dts/Bindings/reset/uniphier-reset.txt
+++ b/dts/Bindings/reset/uniphier-reset.txt
@@ -1,123 +1,4 @@
-UniPhier reset controller
-
-
-System reset
-------------
-
-Required properties:
-- compatible: should be one of the following:
-    "socionext,uniphier-ld4-reset"  - for LD4 SoC
-    "socionext,uniphier-pro4-reset" - for Pro4 SoC
-    "socionext,uniphier-sld8-reset" - for sLD8 SoC
-    "socionext,uniphier-pro5-reset" - for Pro5 SoC
-    "socionext,uniphier-pxs2-reset" - for PXs2/LD6b SoC
-    "socionext,uniphier-ld11-reset" - for LD11 SoC
-    "socionext,uniphier-ld20-reset" - for LD20 SoC
-    "socionext,uniphier-pxs3-reset" - for PXs3 SoC
-- #reset-cells: should be 1.
-
-Example:
-
-	sysctrl@61840000 {
-		compatible = "socionext,uniphier-ld11-sysctrl",
-			     "simple-mfd", "syscon";
-		reg = <0x61840000 0x4000>;
-
-		reset {
-			compatible = "socionext,uniphier-ld11-reset";
-			#reset-cells = <1>;
-		};
-
-		other nodes ...
-	};
-
-
-Media I/O (MIO) reset, SD reset
--------------------------------
-
-Required properties:
-- compatible: should be one of the following:
-    "socionext,uniphier-ld4-mio-reset"  - for LD4 SoC
-    "socionext,uniphier-pro4-mio-reset" - for Pro4 SoC
-    "socionext,uniphier-sld8-mio-reset" - for sLD8 SoC
-    "socionext,uniphier-pro5-sd-reset"  - for Pro5 SoC
-    "socionext,uniphier-pxs2-sd-reset"  - for PXs2/LD6b SoC
-    "socionext,uniphier-ld11-mio-reset" - for LD11 SoC (MIO)
-    "socionext,uniphier-ld11-sd-reset"  - for LD11 SoC (SD)
-    "socionext,uniphier-ld20-sd-reset"  - for LD20 SoC
-    "socionext,uniphier-pxs3-sd-reset"  - for PXs3 SoC
-- #reset-cells: should be 1.
-
-Example:
-
-	mioctrl@59810000 {
-		compatible = "socionext,uniphier-ld11-mioctrl",
-			     "simple-mfd", "syscon";
-		reg = <0x59810000 0x800>;
-
-		reset {
-			compatible = "socionext,uniphier-ld11-mio-reset";
-			#reset-cells = <1>;
-		};
-
-		other nodes ...
-	};
-
-
-Peripheral reset
-----------------
-
-Required properties:
-- compatible: should be one of the following:
-    "socionext,uniphier-ld4-peri-reset"  - for LD4 SoC
-    "socionext,uniphier-pro4-peri-reset" - for Pro4 SoC
-    "socionext,uniphier-sld8-peri-reset" - for sLD8 SoC
-    "socionext,uniphier-pro5-peri-reset" - for Pro5 SoC
-    "socionext,uniphier-pxs2-peri-reset" - for PXs2/LD6b SoC
-    "socionext,uniphier-ld11-peri-reset" - for LD11 SoC
-    "socionext,uniphier-ld20-peri-reset" - for LD20 SoC
-    "socionext,uniphier-pxs3-peri-reset" - for PXs3 SoC
-- #reset-cells: should be 1.
-
-Example:
-
-	perictrl@59820000 {
-		compatible = "socionext,uniphier-ld11-perictrl",
-			     "simple-mfd", "syscon";
-		reg = <0x59820000 0x200>;
-
-		reset {
-			compatible = "socionext,uniphier-ld11-peri-reset";
-			#reset-cells = <1>;
-		};
-
-		other nodes ...
-	};
-
-
-Analog signal amplifier reset
------------------------------
-
-Required properties:
-- compatible: should be one of the following:
-    "socionext,uniphier-ld11-adamv-reset" - for LD11 SoC
-    "socionext,uniphier-ld20-adamv-reset" - for LD20 SoC
-- #reset-cells: should be 1.
-
-Example:
-
-	adamv@57920000 {
-		compatible = "socionext,uniphier-ld11-adamv",
-			     "simple-mfd", "syscon";
-		reg = <0x57920000 0x1000>;
-
-		adamv_rst: reset {
-			compatible = "socionext,uniphier-ld11-adamv-reset";
-			#reset-cells = <1>;
-		};
-
-		other nodes ...
-	};
+UniPhier glue reset controller
 
 
 Peripheral core reset in glue layer