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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2016-02-03 10:25:36 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-02-04 08:40:36 +0100 |
| commit | 0ff58575c9d66f660886387c2e68d8c5c724e87b (patch) | |
| tree | 4a889d1478da83ae46db96f5c049872cdb90eeb6 /dts/Bindings/reset | |
| parent | a0da52f83c36a81984e0fca4b75d522b955df267 (diff) | |
| download | barebox-0ff58575c9d66f660886387c2e68d8c5c724e87b.tar.gz barebox-0ff58575c9d66f660886387c2e68d8c5c724e87b.tar.xz | |
dts: update to v4.5-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/reset')
| -rw-r--r-- | dts/Bindings/reset/hisilicon,hi6220-reset.txt | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/dts/Bindings/reset/hisilicon,hi6220-reset.txt b/dts/Bindings/reset/hisilicon,hi6220-reset.txt new file mode 100644 index 0000000000..e0b185a944 --- /dev/null +++ b/dts/Bindings/reset/hisilicon,hi6220-reset.txt @@ -0,0 +1,34 @@ +Hisilicon System Reset Controller +====================================== + +Please also refer to reset.txt in this directory for common reset +controller binding usage. + +The reset controller registers are part of the system-ctl block on +hi6220 SoC. + +Required properties: +- compatible: may be "hisilicon,hi6220-sysctrl" +- reg: should be register base and length as documented in the + datasheet +- #reset-cells: 1, see below + +Example: +sys_ctrl: sys_ctrl@f7030000 { + compatible = "hisilicon,hi6220-sysctrl", "syscon"; + reg = <0x0 0xf7030000 0x0 0x2000>; + #clock-cells = <1>; + #reset-cells = <1>; +}; + +Specifying reset lines connected to IP modules +============================================== +example: + + uart1: serial@..... { + ... + resets = <&sys_ctrl PERIPH_RSTEN3_UART1>; + ... + }; + +The index could be found in <dt-bindings/reset/hisi,hi6220-resets.h>. |