diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2019-12-19 05:46:54 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-12-19 05:46:54 +0100 |
| commit | 574eed3f6fcf056aa4c9e46c4b5224e3f7844d8d (patch) | |
| tree | 3fbe9ed379bc0d6c536860845e85a4ede4b36bbc /dts/Bindings/serial/8250.txt | |
| parent | 179dedbc6d85d7ea7c8013513b364a75f32943e8 (diff) | |
| download | barebox-574eed3f6fcf056aa4c9e46c4b5224e3f7844d8d.tar.gz barebox-574eed3f6fcf056aa4c9e46c4b5224e3f7844d8d.tar.xz | |
dts: update to v5.5-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/serial/8250.txt')
| -rw-r--r-- | dts/Bindings/serial/8250.txt | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/dts/Bindings/serial/8250.txt b/dts/Bindings/serial/8250.txt index 20d351f268..55700f20f6 100644 --- a/dts/Bindings/serial/8250.txt +++ b/dts/Bindings/serial/8250.txt @@ -56,6 +56,11 @@ Optional properties: - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD line respectively. It will use specified GPIO instead of the peripheral function pin for the UART feature. If unsure, don't specify this property. +- aspeed,sirq-polarity-sense: Only applicable to aspeed,ast2500-vuart. + phandle to aspeed,ast2500-scu compatible syscon alongside register offset + and bit number to identify how the SIRQ polarity should be configured. + One possible data source is the LPC/eSPI mode bit. + Example: aspeed,sirq-polarity-sense = <&syscon 0x70 25> Note: * fsl,ns16550: |