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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2016-11-15 09:02:29 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-01-10 08:48:45 +0100 |
| commit | 37beaba4559bf62e6f4b35abc4ded9f7e7ed6796 (patch) | |
| tree | 968d658900dc8f298ca13af7262813100e7680ba /dts/Bindings/serial/cdns,uart.txt | |
| parent | c580e8422c0cb6dfe963c826a9d83214e6f0aa8a (diff) | |
| download | barebox-37beaba4559bf62e6f4b35abc4ded9f7e7ed6796.tar.gz barebox-37beaba4559bf62e6f4b35abc4ded9f7e7ed6796.tar.xz | |
dts: update to v4.9-rc3
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/serial/cdns,uart.txt')
| -rw-r--r-- | dts/Bindings/serial/cdns,uart.txt | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/dts/Bindings/serial/cdns,uart.txt b/dts/Bindings/serial/cdns,uart.txt index a3eb154c32..227bb770b0 100644 --- a/dts/Bindings/serial/cdns,uart.txt +++ b/dts/Bindings/serial/cdns,uart.txt @@ -1,7 +1,9 @@ Binding for Cadence UART Controller Required properties: -- compatible : should be "cdns,uart-r1p8", or "xlnx,xuartps" +- compatible : + Use "xlnx,xuartps","cdns,uart-r1p8" for Zynq-7xxx SoC. + Use "xlnx,zynqmp-uart","cdns,uart-r1p12" for Zynq Ultrascale+ MPSoC. - reg: Should contain UART controller registers location and length. - interrupts: Should contain UART controller interrupts. - clocks: Must contain phandles to the UART clocks |