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author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-03-03 08:11:01 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-03-03 08:11:01 +0100 |
commit | eaa819409db6ac80fbd7c3d36450b2d1bec93576 (patch) | |
tree | 6cd5e0c7f8abe121af237b701ee9e0e1b6f7e40d /dts/Bindings/sound/designware-i2s.txt | |
parent | 0c9aadb6185e1d84746b632284bc89e4e4c80cd3 (diff) | |
download | barebox-eaa819409db6ac80fbd7c3d36450b2d1bec93576.tar.gz barebox-eaa819409db6ac80fbd7c3d36450b2d1bec93576.tar.xz |
dts: update to v4.0-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/sound/designware-i2s.txt')
-rw-r--r-- | dts/Bindings/sound/designware-i2s.txt | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/dts/Bindings/sound/designware-i2s.txt b/dts/Bindings/sound/designware-i2s.txt new file mode 100644 index 0000000000..7bb54247f8 --- /dev/null +++ b/dts/Bindings/sound/designware-i2s.txt @@ -0,0 +1,31 @@ +DesignWare I2S controller + +Required properties: + - compatible : Must be "snps,designware-i2s" + - reg : Must contain the I2S core's registers location and length + - clocks : Pairs of phandle and specifier referencing the controller's + clocks. The controller expects one clock: the clock used as the sampling + rate reference clock sample. + - clock-names : "i2sclk" for the sample rate reference clock. + - dmas: Pairs of phandle and specifier for the DMA channels that are used by + the core. The core expects one or two dma channels: one for transmit and + one for receive. + - dma-names : "tx" for the transmit channel, "rx" for the receive channel. + +For more details on the 'dma', 'dma-names', 'clock' and 'clock-names' +properties please check: + * resource-names.txt + * clock/clock-bindings.txt + * dma/dma.txt + +Example: + + soc_i2s: i2s@7ff90000 { + compatible = "snps,designware-i2s"; + reg = <0x0 0x7ff90000 0x0 0x1000>; + clocks = <&scpi_i2sclk 0>; + clock-names = "i2sclk"; + #sound-dai-cells = <0>; + dmas = <&dma0 5>; + dma-names = "tx"; + }; |