dts: update to v4.12-rc1

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

1 files changed, 7 insertions, 3 deletions

diff --git a/dts/Bindings/sound/tas2552.txt b/dts/Bindings/sound/tas2552.txt
index c49992c0b6..2d71eb05c1 100644
--- a/dts/Bindings/sound/tas2552.txt
+++ b/dts/Bindings/sound/tas2552.txt
@@ -5,7 +5,8 @@ The tas2552 serial control bus communicates through I2C protocols
 Required properties:
 	- compatible - One of:
 		"ti,tas2552" - TAS2552
-	- reg -  I2C slave address
+	- reg -  I2C slave address: it can be 0x40 if ADDR pin is 0
+				    or 0x41 if ADDR pin is 1.
 	- supply-*: Required supply regulators are:
 		"vbat"		battery voltage
 		"iovdd"		I/O Voltage
@@ -14,17 +15,20 @@ Required properties:
 Optional properties:
 	- enable-gpio - gpio pin to enable/disable the device
 
-tas2552 can receive it's reference clock via MCLK, BCLK, IVCLKIN pin or use the
+tas2552 can receive its reference clock via MCLK, BCLK, IVCLKIN pin or use the
 internal 1.8MHz. This CLKIN is used by the PLL. In addition to PLL, the PDM
 reference clock is also selectable: PLL, IVCLKIN, BCLK or MCLK.
 For system integration the dt-bindings/sound/tas2552.h header file provides
-defined values to selct and configure the PLL and PDM reference clocks.
+defined values to select and configure the PLL and PDM reference clocks.
 
 Example:
 
 tas2552: tas2552@41 {
 	compatible = "ti,tas2552";
 	reg = <0x41>;
+	vbat-supply = <&reg_vbat>;
+	iovdd-supply = <&reg_iovdd>;
+	avdd-supply = <&reg_avdd>;
 	enable-gpio = <&gpio4 2 GPIO_ACTIVE_HIGH>;
 };