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author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-11-07 09:48:28 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-11-08 08:57:14 +0100 |
commit | 646d1a09f05689a3a4781112a3b3e4747d0ba231 (patch) | |
tree | fe48ab82140e06e495051098fde1d97a4b1e56d5 /dts/Bindings/spi/spi-pxa2xx.txt | |
parent | ebc406c1ab2be0e6002e1d8ccbc5c1377a882895 (diff) | |
download | barebox-646d1a09f05689a3a4781112a3b3e4747d0ba231.tar.gz barebox-646d1a09f05689a3a4781112a3b3e4747d0ba231.tar.xz |
dts: update to v4.20-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/spi/spi-pxa2xx.txt')
-rw-r--r-- | dts/Bindings/spi/spi-pxa2xx.txt | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/dts/Bindings/spi/spi-pxa2xx.txt b/dts/Bindings/spi/spi-pxa2xx.txt new file mode 100644 index 0000000000..0335a9bd2e --- /dev/null +++ b/dts/Bindings/spi/spi-pxa2xx.txt @@ -0,0 +1,24 @@ +PXA2xx SSP SPI Controller + +Required properties: +- compatible: Must be "marvell,mmp2-ssp". +- reg: Offset and length of the device's register set. +- interrupts: Should be the interrupt number. +- clocks: Should contain a single entry describing the clock input. +- #address-cells: Number of cells required to define a chip select address. +- #size-cells: Should be zero. + +Optional properties: +- cs-gpios: list of GPIO chip selects. See the SPI bus bindings, + Documentation/devicetree/bindings/spi/spi-bus.txt + +Child nodes represent devices on the SPI bus + See ../spi/spi-bus.txt + +Example: + ssp1: spi@d4035000 { + compatible = "marvell,mmp2-ssp"; + reg = <0xd4035000 0x1000>; + clocks = <&soc_clocks MMP2_CLK_SSP0>; + interrupts = <0>; + }; |