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authorSascha Hauer <s.hauer@pengutronix.de>2022-08-24 08:46:04 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2022-08-25 15:39:39 +0200
commiteddd8312948329e28f00a6f1ca52b3e7f3c330ee (patch)
tree1b4ef77f92f72af55f853e09be1789a4206fbcb6 /dts/Bindings/spi
parenteed776a50f486d4c1951da32a30d3fd1588ac6e2 (diff)
downloadbarebox-eddd8312948329e28f00a6f1ca52b3e7f3c330ee.tar.gz
barebox-eddd8312948329e28f00a6f1ca52b3e7f3c330ee.tar.xz
dts: update to v6.0-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/spi')
-rw-r--r--dts/Bindings/spi/atmel,at91rm9200-spi.yaml75
-rw-r--r--dts/Bindings/spi/efm32-spi.txt39
-rw-r--r--dts/Bindings/spi/hpe,gxp-spifi.yaml56
-rw-r--r--dts/Bindings/spi/mediatek,spi-mt65xx.yaml2
-rw-r--r--dts/Bindings/spi/mediatek,spi-mtk-nor.yaml15
-rw-r--r--dts/Bindings/spi/nuvoton,npcm-fiu.txt13
-rw-r--r--dts/Bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml33
-rw-r--r--dts/Bindings/spi/nvidia,tegra210-quad.yaml22
-rw-r--r--dts/Bindings/spi/qcom,spi-geni-qcom.yaml5
-rw-r--r--dts/Bindings/spi/samsung,spi.yaml6
-rw-r--r--dts/Bindings/spi/snps,dw-apb-ssi.yaml26
-rw-r--r--dts/Bindings/spi/spi-cadence.yaml7
-rw-r--r--dts/Bindings/spi/spi-controller.yaml19
-rw-r--r--dts/Bindings/spi/spi-peripheral-props.yaml16
-rw-r--r--dts/Bindings/spi/spi-zynqmp-qspi.yaml7
-rw-r--r--dts/Bindings/spi/spi_atmel.txt36
16 files changed, 243 insertions, 134 deletions
diff --git a/dts/Bindings/spi/atmel,at91rm9200-spi.yaml b/dts/Bindings/spi/atmel,at91rm9200-spi.yaml
new file mode 100644
index 0000000000..d85d54024b
--- /dev/null
+++ b/dts/Bindings/spi/atmel,at91rm9200-spi.yaml
@@ -0,0 +1,75 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/atmel,at91rm9200-spi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Atmel SPI device
+
+maintainers:
+ - Tudor Ambarus <tudor.ambarus@microchip.com>
+
+allOf:
+ - $ref: spi-controller.yaml#
+
+properties:
+ compatible:
+ oneOf:
+ - const: atmel,at91rm9200-spi
+ - items:
+ - const: microchip,sam9x60-spi
+ - const: atmel,at91rm9200-spi
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clock-names:
+ contains:
+ const: spi_clk
+
+ clocks:
+ maxItems: 1
+
+ atmel,fifo-size:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: |
+ Maximum number of data the RX and TX FIFOs can store for FIFO
+ capable SPI controllers.
+ enum: [ 16, 32 ]
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clock-names
+ - clocks
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/gpio/gpio.h>
+ #include <dt-bindings/interrupt-controller/irq.h>
+
+ spi1: spi@fffcc000 {
+ compatible = "atmel,at91rm9200-spi";
+ reg = <0xfffcc000 0x4000>;
+ interrupts = <13 IRQ_TYPE_LEVEL_HIGH 5>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&spi1_clk>;
+ clock-names = "spi_clk";
+ cs-gpios = <&pioB 3 GPIO_ACTIVE_HIGH>;
+ atmel,fifo-size = <32>;
+
+ mmc@0 {
+ compatible = "mmc-spi-slot";
+ reg = <0>;
+ gpios = <&pioC 4 GPIO_ACTIVE_HIGH>; /* CD */
+ spi-max-frequency = <25000000>;
+ };
+ };
diff --git a/dts/Bindings/spi/efm32-spi.txt b/dts/Bindings/spi/efm32-spi.txt
deleted file mode 100644
index e0fa61a1be..0000000000
--- a/dts/Bindings/spi/efm32-spi.txt
+++ /dev/null
@@ -1,39 +0,0 @@
-* Energy Micro EFM32 SPI
-
-Required properties:
-- #address-cells: see spi-bus.txt
-- #size-cells: see spi-bus.txt
-- compatible: should be "energymicro,efm32-spi"
-- reg: Offset and length of the register set for the controller
-- interrupts: pair specifying rx and tx irq
-- clocks: phandle to the spi clock
-- cs-gpios: see spi-bus.txt
-
-Recommended properties :
-- energymicro,location: Value to write to the ROUTE register's LOCATION
- bitfield to configure the pinmux for the device, see
- datasheet for values.
- If this property is not provided, keeping what is
- already configured in the hardware, so its either the
- reset default 0 or whatever the bootloader did.
-
-Example:
-
-spi1: spi@4000c400 { /* USART1 */
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "energymicro,efm32-spi";
- reg = <0x4000c400 0x400>;
- interrupts = <15 16>;
- clocks = <&cmu 20>;
- cs-gpios = <&gpio 51 1>; // D3
- energymicro,location = <1>;
-
- ks8851@0 {
- compatible = "ks8851";
- spi-max-frequency = <6000000>;
- reg = <0>;
- interrupt-parent = <&boardfpga>;
- interrupts = <4>;
- };
-};
diff --git a/dts/Bindings/spi/hpe,gxp-spifi.yaml b/dts/Bindings/spi/hpe,gxp-spifi.yaml
new file mode 100644
index 0000000000..7797c3123b
--- /dev/null
+++ b/dts/Bindings/spi/hpe,gxp-spifi.yaml
@@ -0,0 +1,56 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/hpe,gxp-spifi.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: HPE GXP spi controller flash interface
+
+maintainers:
+ - Nick Hawkins <nick.hawkins@hpe.com>
+ - Jean-Marie Verdun <verdun@hpe.com>
+
+allOf:
+ - $ref: spi-controller.yaml#
+
+properties:
+ compatible:
+ const: hpe,gxp-spifi
+
+ reg:
+ items:
+ - description: cfg registers
+ - description: data registers
+ - description: mapped memory
+
+ interrupts:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+
+unevaluatedProperties: false
+
+examples:
+ - |
+
+ spi@200 {
+ compatible = "hpe,gxp-spifi";
+ reg = <0x200 0x80>, <0xc000 0x100>, <0x38000000 0x800000>;
+ interrupts = <20>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ flash@0 {
+ reg = <0>;
+ compatible = "jedec,spi-nor";
+ };
+
+ flash@1 {
+ reg = <1>;
+ compatible = "jedec,spi-nor";
+ };
+ };
diff --git a/dts/Bindings/spi/mediatek,spi-mt65xx.yaml b/dts/Bindings/spi/mediatek,spi-mt65xx.yaml
index 94ef0552bd..8d2a6c084e 100644
--- a/dts/Bindings/spi/mediatek,spi-mt65xx.yaml
+++ b/dts/Bindings/spi/mediatek,spi-mt65xx.yaml
@@ -18,6 +18,7 @@ properties:
- items:
- enum:
- mediatek,mt7629-spi
+ - mediatek,mt8365-spi
- const: mediatek,mt7622-spi
- items:
- enum:
@@ -33,6 +34,7 @@ properties:
- items:
- enum:
- mediatek,mt7986-spi-ipm
+ - mediatek,mt8188-spi-ipm
- const: mediatek,spi-ipm
- items:
- enum:
diff --git a/dts/Bindings/spi/mediatek,spi-mtk-nor.yaml b/dts/Bindings/spi/mediatek,spi-mtk-nor.yaml
index 41e60fe4b0..970b111989 100644
--- a/dts/Bindings/spi/mediatek,spi-mtk-nor.yaml
+++ b/dts/Bindings/spi/mediatek,spi-mtk-nor.yaml
@@ -23,6 +23,10 @@ allOf:
properties:
compatible:
oneOf:
+ - enum:
+ - mediatek,mt8173-nor
+ - mediatek,mt8186-nor
+ - mediatek,mt8192-nor
- items:
- enum:
- mediatek,mt2701-nor
@@ -30,13 +34,13 @@ properties:
- mediatek,mt7622-nor
- mediatek,mt7623-nor
- mediatek,mt7629-nor
- - mediatek,mt8186-nor
- - mediatek,mt8192-nor
- mediatek,mt8195-nor
- - enum:
- - mediatek,mt8173-nor
- - items:
- const: mediatek,mt8173-nor
+ - items:
+ - enum:
+ - mediatek,mt8188-nor
+ - const: mediatek,mt8186-nor
+
reg:
maxItems: 1
@@ -64,7 +68,6 @@ properties:
required:
- compatible
- reg
- - interrupts
- clocks
- clock-names
diff --git a/dts/Bindings/spi/nuvoton,npcm-fiu.txt b/dts/Bindings/spi/nuvoton,npcm-fiu.txt
index a388005842..c63ce4cc0a 100644
--- a/dts/Bindings/spi/nuvoton,npcm-fiu.txt
+++ b/dts/Bindings/spi/nuvoton,npcm-fiu.txt
@@ -6,8 +6,13 @@ The NPCM7XX supports three FIU modules,
FIU0 and FIUx supports two chip selects,
FIU3 support four chip select.
+The NPCM8XX supports four FIU modules,
+FIU0 and FIUx supports two chip selects,
+FIU1 and FIU3 supports four chip selects.
+
Required properties:
- - compatible : "nuvoton,npcm750-fiu" for the NPCM7XX BMC
+ - compatible : "nuvoton,npcm750-fiu" for Poleg NPCM7XX BMC
+ "nuvoton,npcm845-fiu" for Arbel NPCM8XX BMC
- #address-cells : should be 1.
- #size-cells : should be 0.
- reg : the first contains the register location and length,
@@ -30,6 +35,12 @@ Aliases:
fiu1 represent fiu 3 controller
fiu2 represent fiu x controller
+ In the NPCM8XX BMC:
+ fiu0 represent fiu 0 controller
+ fiu1 represent fiu 1 controller
+ fiu2 represent fiu 3 controller
+ fiu3 represent fiu x controller
+
Example:
fiu3: spi@c00000000 {
compatible = "nuvoton,npcm750-fiu";
diff --git a/dts/Bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml b/dts/Bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml
new file mode 100644
index 0000000000..24e0c2181d
--- /dev/null
+++ b/dts/Bindings/spi/nvidia,tegra210-quad-peripheral-props.yaml
@@ -0,0 +1,33 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/spi/nvidia,tegra210-quad-peripheral-props.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Peripheral properties for Tegra Quad SPI Controller
+
+maintainers:
+ - Thierry Reding <thierry.reding@gmail.com>
+ - Jonathan Hunter <jonathanh@nvidia.com>
+
+properties:
+ nvidia,tx-clk-tap-delay:
+ description:
+ Delays the clock going out to device with this tap value.
+ Tap value varies based on platform design trace lengths from Tegra
+ QSPI to corresponding slave device.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 31
+
+ nvidia,rx-clk-tap-delay:
+ description:
+ Delays the clock coming in from the device with this tap value.
+ Tap value varies based on platform design trace lengths from Tegra
+ QSPI to corresponding slave device.
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 0
+ maximum: 255
+
+unevaluatedProperties: true
+
diff --git a/dts/Bindings/spi/nvidia,tegra210-quad.yaml b/dts/Bindings/spi/nvidia,tegra210-quad.yaml
index 0296edd1de..6b733e5c11 100644
--- a/dts/Bindings/spi/nvidia,tegra210-quad.yaml
+++ b/dts/Bindings/spi/nvidia,tegra210-quad.yaml
@@ -20,6 +20,7 @@ properties:
- nvidia,tegra186-qspi
- nvidia,tegra194-qspi
- nvidia,tegra234-qspi
+ - nvidia,tegra241-qspi
reg:
maxItems: 1
@@ -57,27 +58,6 @@ patternProperties:
spi-tx-bus-width:
enum: [1, 2, 4]
- nvidia,tx-clk-tap-delay:
- description:
- Delays the clock going out to device with this tap value.
- Tap value varies based on platform design trace lengths from Tegra
- QSPI to corresponding slave device.
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0
- maximum: 31
-
- nvidia,rx-clk-tap-delay:
- description:
- Delays the clock coming in from the device with this tap value.
- Tap value varies based on platform design trace lengths from Tegra
- QSPI to corresponding slave device.
- $ref: /schemas/types.yaml#/definitions/uint32
- minimum: 0
- maximum: 255
-
- required:
- - reg
-
required:
- compatible
- reg
diff --git a/dts/Bindings/spi/qcom,spi-geni-qcom.yaml b/dts/Bindings/spi/qcom,spi-geni-qcom.yaml
index 78ceb9d677..2e20ca313e 100644
--- a/dts/Bindings/spi/qcom,spi-geni-qcom.yaml
+++ b/dts/Bindings/spi/qcom,spi-geni-qcom.yaml
@@ -45,12 +45,15 @@ properties:
- const: rx
interconnects:
- maxItems: 2
+ minItems: 2
+ maxItems: 3
interconnect-names:
+ minItems: 2
items:
- const: qup-core
- const: qup-config
+ - const: qup-memory
interrupts:
maxItems: 1
diff --git a/dts/Bindings/spi/samsung,spi.yaml b/dts/Bindings/spi/samsung,spi.yaml
index a50f24f935..e0a465d70b 100644
--- a/dts/Bindings/spi/samsung,spi.yaml
+++ b/dts/Bindings/spi/samsung,spi.yaml
@@ -20,7 +20,9 @@ properties:
- samsung,s3c2443-spi # for S3C2443, S3C2416 and S3C2450
- samsung,s3c6410-spi
- samsung,s5pv210-spi # for S5PV210 and S5PC110
+ - samsung,exynos4210-spi
- samsung,exynos5433-spi
+ - samsung,exynosautov9-spi
- tesla,fsd-spi
- const: samsung,exynos7-spi
deprecated: true
@@ -85,7 +87,9 @@ allOf:
properties:
compatible:
contains:
- const: samsung,exynos5433-spi
+ enum:
+ - samsung,exynos5433-spi
+ - samsung,exynosautov9-spi
then:
properties:
clocks:
diff --git a/dts/Bindings/spi/snps,dw-apb-ssi.yaml b/dts/Bindings/spi/snps,dw-apb-ssi.yaml
index d7e08b03e2..37c3c27240 100644
--- a/dts/Bindings/spi/snps,dw-apb-ssi.yaml
+++ b/dts/Bindings/spi/snps,dw-apb-ssi.yaml
@@ -61,6 +61,8 @@ properties:
- const: snps,dw-apb-ssi
- description: Intel Keem Bay SPI Controller
const: intel,keembay-ssi
+ - description: Intel Thunder Bay SPI Controller
+ const: intel,thunderbay-ssi
- description: Baikal-T1 SPI Controller
const: baikal,bt1-ssi
- description: Baikal-T1 System Boot SPI Controller
@@ -124,9 +126,16 @@ properties:
rx-sample-delay-ns:
default: 0
- description: Default value of the rx-sample-delay-ns property.
+ description: |
+ Default value of the rx-sample-delay-ns property.
This value will be used if the property is not explicitly defined
- for a SPI slave device. See below.
+ for a SPI slave device.
+
+ SPI Rx sample delay offset, unit is nanoseconds.
+ The delay from the default sample time before the actual sample of the
+ rxd input signal occurs. The "rx_sample_delay" is an optional feature
+ of the designware controller, and the upper limit is also subject to
+ controller configuration.
patternProperties:
"^.*@[0-9a-f]+$":
@@ -136,19 +145,6 @@ patternProperties:
minimum: 0
maximum: 3
- spi-rx-bus-width:
- const: 1
-
- spi-tx-bus-width:
- const: 1
-
- rx-sample-delay-ns:
- description: SPI Rx sample delay offset, unit is nanoseconds.
- The delay from the default sample time before the actual
- sample of the rxd input signal occurs. The "rx_sample_delay"
- is an optional feature of the designware controller, and the
- upper limit is also subject to controller configuration.
-
unevaluatedProperties: false
required:
diff --git a/dts/Bindings/spi/spi-cadence.yaml b/dts/Bindings/spi/spi-cadence.yaml
index 9787be2131..82d0ca5c00 100644
--- a/dts/Bindings/spi/spi-cadence.yaml
+++ b/dts/Bindings/spi/spi-cadence.yaml
@@ -49,6 +49,13 @@ properties:
enum: [ 0, 1 ]
default: 0
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clock-names
+ - clocks
+
unevaluatedProperties: false
examples:
diff --git a/dts/Bindings/spi/spi-controller.yaml b/dts/Bindings/spi/spi-controller.yaml
index ebb4d5f1cf..655713fba7 100644
--- a/dts/Bindings/spi/spi-controller.yaml
+++ b/dts/Bindings/spi/spi-controller.yaml
@@ -95,6 +95,17 @@ patternProperties:
type: object
$ref: spi-peripheral-props.yaml
+ properties:
+ spi-cpha:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ The device requires shifted clock phase (CPHA) mode.
+
+ spi-cpol:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description:
+ The device requires inverse clock polarity (CPOL) mode.
+
required:
- compatible
- reg
@@ -139,9 +150,9 @@ examples:
};
flash@2 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <50000000>;
- reg = <2>, <3>;
- stacked-memories = /bits/ 64 <0x10000000 0x10000000>;
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <50000000>;
+ reg = <2>, <3>;
+ stacked-memories = /bits/ 64 <0x10000000 0x10000000>;
};
};
diff --git a/dts/Bindings/spi/spi-peripheral-props.yaml b/dts/Bindings/spi/spi-peripheral-props.yaml
index 5e32928c4f..ce048e782e 100644
--- a/dts/Bindings/spi/spi-peripheral-props.yaml
+++ b/dts/Bindings/spi/spi-peripheral-props.yaml
@@ -34,16 +34,6 @@ properties:
description:
The device requires 3-wire mode.
- spi-cpha:
- $ref: /schemas/types.yaml#/definitions/flag
- description:
- The device requires shifted clock phase (CPHA) mode.
-
- spi-cpol:
- $ref: /schemas/types.yaml#/definitions/flag
- description:
- The device requires inverse clock polarity (CPOL) mode.
-
spi-cs-high:
$ref: /schemas/types.yaml#/definitions/flag
description:
@@ -71,6 +61,11 @@ properties:
description:
Delay, in microseconds, after a read transfer.
+ rx-sample-delay-ns:
+ description: SPI Rx sample delay offset, unit is nanoseconds.
+ The delay from the default sample time before the actual
+ sample of the rxd input signal occurs.
+
spi-tx-bus-width:
description:
Bus width to the SPI bus used for write transfers.
@@ -112,5 +107,6 @@ properties:
allOf:
- $ref: cdns,qspi-nor-peripheral-props.yaml#
- $ref: samsung,spi-peripheral-props.yaml#
+ - $ref: nvidia,tegra210-quad-peripheral-props.yaml#
additionalProperties: true
diff --git a/dts/Bindings/spi/spi-zynqmp-qspi.yaml b/dts/Bindings/spi/spi-zynqmp-qspi.yaml
index ea72c80012..fafde1c06b 100644
--- a/dts/Bindings/spi/spi-zynqmp-qspi.yaml
+++ b/dts/Bindings/spi/spi-zynqmp-qspi.yaml
@@ -30,6 +30,13 @@ properties:
clocks:
maxItems: 2
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clock-names
+ - clocks
+
unevaluatedProperties: false
examples:
diff --git a/dts/Bindings/spi/spi_atmel.txt b/dts/Bindings/spi/spi_atmel.txt
deleted file mode 100644
index 5bb4a8f1df..0000000000
--- a/dts/Bindings/spi/spi_atmel.txt
+++ /dev/null
@@ -1,36 +0,0 @@
-Atmel SPI device
-
-Required properties:
-- compatible : should be "atmel,at91rm9200-spi" or "microchip,sam9x60-spi".
-- reg: Address and length of the register set for the device
-- interrupts: Should contain spi interrupt
-- cs-gpios: chipselects (optional for SPI controller version >= 2 with the
- Chip Select Active After Transfer feature).
-- clock-names: tuple listing input clock names.
- Required elements: "spi_clk"
-- clocks: phandles to input clocks.
-
-Optional properties:
-- atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
- capable SPI controllers.
-
-Example:
-
-spi1: spi@fffcc000 {
- compatible = "atmel,at91rm9200-spi";
- reg = <0xfffcc000 0x4000>;
- interrupts = <13 4 5>;
- #address-cells = <1>;
- #size-cells = <0>;
- clocks = <&spi1_clk>;
- clock-names = "spi_clk";
- cs-gpios = <&pioB 3 0>;
- atmel,fifo-size = <32>;
-
- mmc-slot@0 {
- compatible = "mmc-spi-slot";
- reg = <0>;
- gpios = <&pioC 4 0>; /* CD */
- spi-max-frequency = <25000000>;
- };
-};