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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2023-03-15 10:57:00 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2023-03-15 13:24:47 +0100 |
| commit | 03b1dd74aa6e8307dde254efe7f1450630362a8a (patch) | |
| tree | 66ee5ede9991313a2ce7a9171d51312ffd9d9a26 /dts/Bindings/ufs | |
| parent | dd86cdf21582baec789488301b881f8b183cbdfa (diff) | |
| download | barebox-03b1dd74aa6e8307dde254efe7f1450630362a8a.tar.gz barebox-03b1dd74aa6e8307dde254efe7f1450630362a8a.tar.xz | |
dts: update to v6.3-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/ufs')
| -rw-r--r-- | dts/Bindings/ufs/qcom,ufs.yaml | 7 | ||||
| -rw-r--r-- | dts/Bindings/ufs/sprd,ums9620-ufs.yaml | 79 |
2 files changed, 86 insertions, 0 deletions
diff --git a/dts/Bindings/ufs/qcom,ufs.yaml b/dts/Bindings/ufs/qcom,ufs.yaml index f2d6298d92..c5a06c0483 100644 --- a/dts/Bindings/ufs/qcom,ufs.yaml +++ b/dts/Bindings/ufs/qcom,ufs.yaml @@ -33,6 +33,7 @@ properties: - qcom,sm8250-ufshc - qcom,sm8350-ufshc - qcom,sm8450-ufshc + - qcom,sm8550-ufshc - const: qcom,ufshc - const: jedec,ufs-2.0 @@ -44,6 +45,8 @@ properties: minItems: 8 maxItems: 11 + dma-coherent: true + interconnects: minItems: 2 maxItems: 2 @@ -71,6 +74,9 @@ properties: minItems: 1 maxItems: 2 + required-opps: + maxItems: 1 + resets: maxItems: 1 @@ -103,6 +109,7 @@ allOf: - qcom,sm8250-ufshc - qcom,sm8350-ufshc - qcom,sm8450-ufshc + - qcom,sm8550-ufshc then: properties: clocks: diff --git a/dts/Bindings/ufs/sprd,ums9620-ufs.yaml b/dts/Bindings/ufs/sprd,ums9620-ufs.yaml new file mode 100644 index 0000000000..36a8ae7794 --- /dev/null +++ b/dts/Bindings/ufs/sprd,ums9620-ufs.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/ufs/sprd,ums9620-ufs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Unisoc Universal Flash Storage (UFS) Controller + +maintainers: + - Zhe Wang <zhe.wang1@unisoc.com> + +allOf: + - $ref: ufs-common.yaml + +properties: + compatible: + const: sprd,ums9620-ufs + + reg: + maxItems: 1 + + clocks: + maxItems: 3 + + clock-names: + items: + - const: controller_eb + - const: cfg_eb + - const: core + + resets: + maxItems: 2 + + reset-names: + items: + - const: controller + - const: device + + vdd-mphy-supply: + description: + Phandle to vdd-mphy supply regulator node. + + sprd,ufs-anlg-syscon: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle of syscon used to control ufs analog regs. + + sprd,aon-apb-syscon: + $ref: /schemas/types.yaml#/definitions/phandle + description: phandle of syscon used to control always-on regs. + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + ufs: ufs@22000000 { + compatible = "sprd,ums9620-ufs"; + reg = <0x22000000 0x3000>; + interrupts = <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; + vcc-supply = <&vddemmccore>; + vdd-mphy-supply = <&vddufs1v2>; + clocks = <&apahb_gate 5>, <&apahb_gate 22>, <&aonapb_clk 52>; + clock-names = "controller_eb", "cfg_eb", "core"; + assigned-clocks = <&aonapb_clk 52>; + assigned-clock-parents = <&g5l_pll 12>; + resets = <&apahb_gate 4>, <&aonapb_gate 69>; + reset-names = "controller", "device"; + sprd,ufs-anlg-syscon = <&anlg_phy_g12_regs>; + sprd,aon-apb-syscon = <&aon_apb_regs>; + }; |