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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-11-09 12:38:26 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-11-09 13:42:10 +0100 |
| commit | 119c632f12509eab4bc58daf629c4b16fffcedca (patch) | |
| tree | 34366b3095d957178b46be47f628a3926ad35ac3 /dts/Bindings/ufs | |
| parent | 89b766c63f94b5fe94db75a6f197c9e6c0f9da7e (diff) | |
| download | barebox-119c632f12509eab4bc58daf629c4b16fffcedca.tar.gz barebox-119c632f12509eab4bc58daf629c4b16fffcedca.tar.xz | |
dts: update to v5.10-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/ufs')
| -rw-r--r-- | dts/Bindings/ufs/ufs-mediatek.txt | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/dts/Bindings/ufs/ufs-mediatek.txt b/dts/Bindings/ufs/ufs-mediatek.txt index 72aab85473..63a953b672 100644 --- a/dts/Bindings/ufs/ufs-mediatek.txt +++ b/dts/Bindings/ufs/ufs-mediatek.txt @@ -9,7 +9,9 @@ contain a phandle reference to UFS M-PHY node. Required properties for UFS nodes: - compatible : Compatible list, contains the following controller: "mediatek,mt8183-ufshci" for MediaTek UFS host controller - present on MT81xx chipsets. + present on MT8183 chipsets. + "mediatek,mt8192-ufshci" for MediaTek UFS host controller + present on MT8192 chipsets. - reg : Address and length of the UFS register set. - phys : phandle to m-phy. - clocks : List of phandle and clock specifier pairs. |