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authorSascha Hauer <s.hauer@pengutronix.de>2020-02-14 09:05:53 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2020-02-18 08:32:25 +0100
commit81ce4a7dec8ba066c73692e10634091b14c1e494 (patch)
treed61574b25fda47711e3efab57c7a5739de477565 /dts/Bindings/usb
parent84b7f86bef670f6751d67131738555fa53ca3f6b (diff)
downloadbarebox-81ce4a7dec8ba066c73692e10634091b14c1e494.tar.gz
barebox-81ce4a7dec8ba066c73692e10634091b14c1e494.tar.xz
dts: update to v5.6-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/usb')
-rw-r--r--dts/Bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml2
-rw-r--r--dts/Bindings/usb/ci-hdrc-usb2.txt4
-rw-r--r--dts/Bindings/usb/dwc2.txt64
-rw-r--r--dts/Bindings/usb/dwc2.yaml151
-rw-r--r--dts/Bindings/usb/generic.txt9
-rw-r--r--dts/Bindings/usb/mediatek,musb.txt57
6 files changed, 218 insertions, 69 deletions
diff --git a/dts/Bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml b/dts/Bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
index 4efb77b653..267fce1659 100644
--- a/dts/Bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
+++ b/dts/Bindings/usb/amlogic,meson-g12a-usb-ctrl.yaml
@@ -107,7 +107,7 @@ examples:
reg = <0xff400000 0x40000>;
interrupts = <31>;
clocks = <&clkc_usb1>;
- clock-names = "ddr";
+ clock-names = "otg";
phys = <&usb2_phy1>;
dr_mode = "peripheral";
g-rx-fifo-size = <192>;
diff --git a/dts/Bindings/usb/ci-hdrc-usb2.txt b/dts/Bindings/usb/ci-hdrc-usb2.txt
index cfc9f40ab6..51376cbe5f 100644
--- a/dts/Bindings/usb/ci-hdrc-usb2.txt
+++ b/dts/Bindings/usb/ci-hdrc-usb2.txt
@@ -15,6 +15,10 @@ Required properties:
"qcom,ci-hdrc"
"chipidea,usb2"
"xlnx,zynq-usb-2.20a"
+ "nvidia,tegra20-udc"
+ "nvidia,tegra30-udc"
+ "nvidia,tegra114-udc"
+ "nvidia,tegra124-udc"
- reg: base address and length of the registers
- interrupts: interrupt for the USB controller
diff --git a/dts/Bindings/usb/dwc2.txt b/dts/Bindings/usb/dwc2.txt
deleted file mode 100644
index aafff3a690..0000000000
--- a/dts/Bindings/usb/dwc2.txt
+++ /dev/null
@@ -1,64 +0,0 @@
-Platform DesignWare HS OTG USB 2.0 controller
------------------------------------------------------
-
-Required properties:
-- compatible : One of:
- - brcm,bcm2835-usb: The DWC2 USB controller instance in the BCM2835 SoC.
- - hisilicon,hi6220-usb: The DWC2 USB controller instance in the hi6220 SoC.
- - rockchip,rk3066-usb: The DWC2 USB controller instance in the rk3066 Soc;
- - "rockchip,px30-usb", "rockchip,rk3066-usb", "snps,dwc2": for px30 Soc;
- - "rockchip,rk3188-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3188 Soc;
- - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;
- - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;
- - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;
- - "amlogic,meson8-usb": The DWC2 USB controller instance in Amlogic Meson8 SoCs;
- - "amlogic,meson8b-usb": The DWC2 USB controller instance in Amlogic Meson8b SoCs;
- - "amlogic,meson-gxbb-usb": The DWC2 USB controller instance in Amlogic S905 SoCs;
- - "amlogic,meson-g12a-usb": The DWC2 USB controller instance in Amlogic G12A SoCs;
- - "amcc,dwc-otg": The DWC2 USB controller instance in AMCC Canyonlands 460EX SoCs;
- - snps,dwc2: A generic DWC2 USB controller with default parameters.
- - "st,stm32f4x9-fsotg": The DWC2 USB FS/HS controller instance in STM32F4x9 SoCs
- configured in FS mode;
- - "st,stm32f4x9-hsotg": The DWC2 USB HS controller instance in STM32F4x9 SoCs
- configured in HS mode;
- - "st,stm32f7-hsotg": The DWC2 USB HS controller instance in STM32F7 SoCs
- configured in HS mode;
-- reg : Should contain 1 register range (address and length)
-- interrupts : Should contain 1 interrupt
-- clocks: clock provider specifier
-- clock-names: shall be "otg"
-Refer to clk/clock-bindings.txt for generic clock consumer properties
-
-Optional properties:
-- phys: phy provider specifier
-- phy-names: shall be "usb2-phy"
-- vbus-supply: reference to the VBUS regulator. Depending on the current mode
- this is enabled (in "host" mode") or disabled (in "peripheral" mode). The
- regulator is updated if the controller is configured in "otg" mode and the
- status changes between "host" and "peripheral".
-Refer to phy/phy-bindings.txt for generic phy consumer properties
-- dr_mode: shall be one of "host", "peripheral" and "otg"
- Refer to usb/generic.txt
-- g-rx-fifo-size: size of rx fifo size in gadget mode.
-- g-np-tx-fifo-size: size of non-periodic tx fifo size in gadget mode.
-- g-tx-fifo-size: size of periodic tx fifo per endpoint (except ep0) in gadget mode.
-- snps,need-phy-for-wake: If present indicates that the phy needs to be left
- on for remote wakeup during suspend.
-- snps,reset-phy-on-wake: If present indicates that we need to reset the PHY when
- we detect a wakeup. This is due to a hardware errata.
-
-Deprecated properties:
-- g-use-dma: gadget DMA mode is automatically detected
-
-Example:
-
- usb@101c0000 {
- compatible = "ralink,rt3050-usb, snps,dwc2";
- reg = <0x101c0000 40000>;
- interrupts = <18>;
- clocks = <&usb_otg_ahb_clk>;
- clock-names = "otg";
- phys = <&usbphy>;
- phy-names = "usb2-phy";
- snps,need-phy-for-wake;
- };
diff --git a/dts/Bindings/usb/dwc2.yaml b/dts/Bindings/usb/dwc2.yaml
new file mode 100644
index 0000000000..71cf7ba322
--- /dev/null
+++ b/dts/Bindings/usb/dwc2.yaml
@@ -0,0 +1,151 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/usb/dwc2.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: DesignWare HS OTG USB 2.0 controller Bindings
+
+maintainers:
+ - Rob Herring <robh@kernel.org>
+
+properties:
+ compatible:
+ oneOf:
+ - const: brcm,bcm2835-usb
+ - const: hisilicon,hi6220-usb
+ - items:
+ - const: rockchip,rk3066-usb
+ - const: snps,dwc2
+ - items:
+ - const: rockchip,px30-usb
+ - const: rockchip,rk3066-usb
+ - const: snps,dwc2
+ - items:
+ - const: rockchip,rk3036-usb
+ - const: rockchip,rk3066-usb
+ - const: snps,dwc2
+ - items:
+ - const: rockchip,rv1108-usb
+ - const: rockchip,rk3066-usb
+ - const: snps,dwc2
+ - items:
+ - const: rockchip,rk3188-usb
+ - const: rockchip,rk3066-usb
+ - const: snps,dwc2
+ - items:
+ - const: rockchip,rk3228-usb
+ - const: rockchip,rk3066-usb
+ - const: snps,dwc2
+ - items:
+ - const: rockchip,rk3288-usb
+ - const: rockchip,rk3066-usb
+ - const: snps,dwc2
+ - const: lantiq,arx100-usb
+ - const: lantiq,xrx200-usb
+ - items:
+ - const: amlogic,meson8-usb
+ - const: snps,dwc2
+ - items:
+ - const: amlogic,meson8b-usb
+ - const: snps,dwc2
+ - const: amlogic,meson-gxbb-usb
+ - items:
+ - const: amlogic,meson-g12a-usb
+ - const: snps,dwc2
+ - const: amcc,dwc-otg
+ - const: snps,dwc2
+ - const: st,stm32f4x9-fsotg
+ - const: st,stm32f4x9-hsotg
+ - const: st,stm32f7-hsotg
+ - const: samsung,s3c6400-hsotg
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: otg
+
+ resets:
+ items:
+ - description: common reset
+ - description: ecc reset
+ minItems: 1
+
+ reset-names:
+ items:
+ - const: dwc2
+ - const: dwc2-ecc
+ minItems: 1
+
+ phys:
+ maxItems: 1
+
+ phy-names:
+ const: usb2-phy
+
+ vbus-supply:
+ description: reference to the VBUS regulator. Depending on the current mode
+ this is enabled (in "host" mode") or disabled (in "peripheral" mode). The
+ regulator is updated if the controller is configured in "otg" mode and the
+ status changes between "host" and "peripheral".
+
+ vusb_d-supply:
+ description: phandle to voltage regulator of digital section,
+
+ vusb_a-supply:
+ description: phandle to voltage regulator of analog section.
+
+ dr_mode:
+ enum: [host, peripheral, otg]
+
+ g-rx-fifo-size:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: size of rx fifo size in gadget mode.
+
+ g-np-tx-fifo-size:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ description: size of non-periodic tx fifo size in gadget mode.
+
+ g-tx-fifo-size:
+ $ref: /schemas/types.yaml#/definitions/uint32-array
+ description: size of periodic tx fifo per endpoint (except ep0) in gadget mode.
+
+ snps,need-phy-for-wake:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: If present indicates that the phy needs to be left on for remote wakeup during suspend.
+
+ snps,reset-phy-on-wake:
+ $ref: /schemas/types.yaml#/definitions/flag
+ description: If present indicates that we need to reset the PHY when we detect a wakeup.
+ This is due to a hardware errata.
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ usb@101c0000 {
+ compatible = "rockchip,rk3066-usb", "snps,dwc2";
+ reg = <0x10180000 0x40000>;
+ interrupts = <18>;
+ clocks = <&usb_otg_ahb_clk>;
+ clock-names = "otg";
+ phys = <&usbphy>;
+ phy-names = "usb2-phy";
+ };
+
+...
diff --git a/dts/Bindings/usb/generic.txt b/dts/Bindings/usb/generic.txt
index cf5a1ad456..e6790d2a4d 100644
--- a/dts/Bindings/usb/generic.txt
+++ b/dts/Bindings/usb/generic.txt
@@ -2,10 +2,11 @@ Generic USB Properties
Optional properties:
- maximum-speed: tells USB controllers we want to work up to a certain
- speed. Valid arguments are "super-speed", "high-speed",
- "full-speed" and "low-speed". In case this isn't passed
- via DT, USB controllers should default to their maximum
- HW capability.
+ speed. Valid arguments are "super-speed-plus",
+ "super-speed", "high-speed", "full-speed" and
+ "low-speed". In case this isn't passed via DT, USB
+ controllers should default to their maximum HW
+ capability.
- dr_mode: tells Dual-Role USB controllers that we want to work on a
particular mode. Valid arguments are "host",
"peripheral" and "otg". In case this attribute isn't
diff --git a/dts/Bindings/usb/mediatek,musb.txt b/dts/Bindings/usb/mediatek,musb.txt
new file mode 100644
index 0000000000..2b8a87c90d
--- /dev/null
+++ b/dts/Bindings/usb/mediatek,musb.txt
@@ -0,0 +1,57 @@
+MediaTek musb DRD/OTG controller
+-------------------------------------------
+
+Required properties:
+ - compatible : should be one of:
+ "mediatek,mt2701-musb"
+ ...
+ followed by "mediatek,mtk-musb"
+ - reg : specifies physical base address and size of
+ the registers
+ - interrupts : interrupt used by musb controller
+ - interrupt-names : must be "mc"
+ - phys : PHY specifier for the OTG phy
+ - dr_mode : should be one of "host", "peripheral" or "otg",
+ refer to usb/generic.txt
+ - clocks : a list of phandle + clock-specifier pairs, one for
+ each entry in clock-names
+ - clock-names : must contain "main", "mcu", "univpll"
+ for clocks of controller
+
+Optional properties:
+ - power-domains : a phandle to USB power domain node to control USB's
+ MTCMOS
+
+Required child nodes:
+ usb connector node as defined in bindings/connector/usb-connector.txt
+Optional properties:
+ - id-gpios : input GPIO for USB ID pin.
+ - vbus-gpios : input GPIO for USB VBUS pin.
+ - vbus-supply : reference to the VBUS regulator, needed when supports
+ dual-role mode
+ - usb-role-switch : use USB Role Switch to support dual-role switch, see
+ usb/generic.txt.
+
+Example:
+
+usb2: usb@11200000 {
+ compatible = "mediatek,mt2701-musb",
+ "mediatek,mtk-musb";
+ reg = <0 0x11200000 0 0x1000>;
+ interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>;
+ interrupt-names = "mc";
+ phys = <&u2port2 PHY_TYPE_USB2>;
+ dr_mode = "otg";
+ clocks = <&pericfg CLK_PERI_USB0>,
+ <&pericfg CLK_PERI_USB0_MCU>,
+ <&pericfg CLK_PERI_USB_SLV>;
+ clock-names = "main","mcu","univpll";
+ power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>;
+ usb-role-switch;
+ connector{
+ compatible = "gpio-usb-b-connector", "usb-b-connector";
+ type = "micro";
+ id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>;
+ vbus-supply = <&usb_vbus>;
+ };
+};