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author | Sascha Hauer <s.hauer@pengutronix.de> | 2017-03-10 08:56:15 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2017-03-10 08:56:15 +0100 |
commit | 957bb6b6bcebc4c36f5f284dfb58d489e81016c6 (patch) | |
tree | 593d098617017987daaf8ce339e0eb29ea09fdde /dts/Bindings/watchdog/zte,zx2967-wdt.txt | |
parent | cc2392cf4f2d5208be427e9ffdeafba192f05cbe (diff) | |
download | barebox-957bb6b6bcebc4c36f5f284dfb58d489e81016c6.tar.gz barebox-957bb6b6bcebc4c36f5f284dfb58d489e81016c6.tar.xz |
dts: update to v4.11-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/watchdog/zte,zx2967-wdt.txt')
-rw-r--r-- | dts/Bindings/watchdog/zte,zx2967-wdt.txt | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/dts/Bindings/watchdog/zte,zx2967-wdt.txt b/dts/Bindings/watchdog/zte,zx2967-wdt.txt new file mode 100644 index 0000000000..06ce677667 --- /dev/null +++ b/dts/Bindings/watchdog/zte,zx2967-wdt.txt @@ -0,0 +1,32 @@ +ZTE zx2967 Watchdog timer + +Required properties: + +- compatible : should be one of the following. + * zte,zx296718-wdt +- reg : Specifies base physical address and size of the registers. +- clocks : Pairs of phandle and specifier referencing the controller's clocks. +- resets : Reference to the reset controller controlling the watchdog + controller. + +Optional properties: + +- timeout-sec : Contains the watchdog timeout in seconds. +- zte,wdt-reset-sysctrl : Directs how to reset system by the watchdog. + if we don't want to restart system when watchdog been triggered, + it's not required, vice versa. + It should include following fields. + * phandle of aon-sysctrl. + * offset of register that be written, should be 0xb0. + * configure value that be written to aon-sysctrl. + * bit mask, corresponding bits will be affected. + +Example: + +wdt: watchdog@1465000 { + compatible = "zte,zx296718-wdt"; + reg = <0x1465000 0x1000>; + clocks = <&topcrm WDT_WCLK>; + resets = <&toprst 35>; + zte,wdt-reset-sysctrl = <&aon_sysctrl 0xb0 1 0x115>; +}; |