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author | Sascha Hauer <s.hauer@pengutronix.de> | 2021-11-17 07:36:09 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-11-17 07:36:09 +0100 |
commit | 3f2f5980d517b6a71ffe54e615bd3a4b58b1c295 (patch) | |
tree | eb5a7bfce811d20e58dd0eb1add0f6cf0e6b86e0 /dts/Bindings/watchdog | |
parent | 81ceab95360295cef146e89a1cd1cd5e590aa75e (diff) | |
download | barebox-3f2f5980d517b6a71ffe54e615bd3a4b58b1c295.tar.gz barebox-3f2f5980d517b6a71ffe54e615bd3a4b58b1c295.tar.xz |
dts: update to v5.16-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/watchdog')
-rw-r--r-- | dts/Bindings/watchdog/allwinner,sun4i-a10-wdt.yaml | 46 | ||||
-rw-r--r-- | dts/Bindings/watchdog/mtk-wdt.txt | 2 | ||||
-rw-r--r-- | dts/Bindings/watchdog/st,stm32-iwdg.yaml | 4 |
3 files changed, 49 insertions, 3 deletions
diff --git a/dts/Bindings/watchdog/allwinner,sun4i-a10-wdt.yaml b/dts/Bindings/watchdog/allwinner,sun4i-a10-wdt.yaml index 9aa3c313c4..43afa24513 100644 --- a/dts/Bindings/watchdog/allwinner,sun4i-a10-wdt.yaml +++ b/dts/Bindings/watchdog/allwinner,sun4i-a10-wdt.yaml @@ -24,16 +24,31 @@ properties: - allwinner,sun50i-a100-wdt - allwinner,sun50i-h6-wdt - allwinner,sun50i-h616-wdt + - allwinner,sun50i-r329-wdt + - allwinner,sun50i-r329-wdt-reset - const: allwinner,sun6i-a31-wdt - items: - const: allwinner,suniv-f1c100s-wdt - const: allwinner,sun4i-a10-wdt + - const: allwinner,sun20i-d1-wdt + - items: + - const: allwinner,sun20i-d1-wdt-reset + - const: allwinner,sun20i-d1-wdt reg: maxItems: 1 clocks: - maxItems: 1 + minItems: 1 + items: + - description: High-frequency oscillator input, divided internally + - description: Low-frequency oscillator input, only found on some variants + + clock-names: + minItems: 1 + items: + - const: hosc + - const: losc interrupts: maxItems: 1 @@ -44,6 +59,35 @@ required: - clocks - interrupts +if: + properties: + compatible: + contains: + enum: + - allwinner,sun20i-d1-wdt + - allwinner,sun20i-d1-wdt-reset + - allwinner,sun50i-r329-wdt + - allwinner,sun50i-r329-wdt-reset + +then: + properties: + clocks: + minItems: 2 + + clock-names: + minItems: 2 + + required: + - clock-names + +else: + properties: + clocks: + maxItems: 1 + + clock-names: + maxItems: 1 + unevaluatedProperties: false examples: diff --git a/dts/Bindings/watchdog/mtk-wdt.txt b/dts/Bindings/watchdog/mtk-wdt.txt index a4e31ce96e..0114871f88 100644 --- a/dts/Bindings/watchdog/mtk-wdt.txt +++ b/dts/Bindings/watchdog/mtk-wdt.txt @@ -22,6 +22,7 @@ Required properties: - reg : Specifies base physical address and size of the registers. Optional properties: +- mediatek,disable-extrst: disable send output reset signal - interrupts: Watchdog pre-timeout (bark) interrupt. - timeout-sec: contains the watchdog timeout in seconds. - #reset-cells: Should be 1. @@ -31,6 +32,7 @@ Example: watchdog: watchdog@10007000 { compatible = "mediatek,mt8183-wdt", "mediatek,mt6589-wdt"; + mediatek,disable-extrst; reg = <0 0x10007000 0 0x100>; interrupts = <GIC_SPI 139 IRQ_TYPE_NONE>; timeout-sec = <10>; diff --git a/dts/Bindings/watchdog/st,stm32-iwdg.yaml b/dts/Bindings/watchdog/st,stm32-iwdg.yaml index 481bf91f98..39736449ba 100644 --- a/dts/Bindings/watchdog/st,stm32-iwdg.yaml +++ b/dts/Bindings/watchdog/st,stm32-iwdg.yaml @@ -7,8 +7,8 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: STMicroelectronics STM32 Independent WatchDoG (IWDG) bindings maintainers: - - Yannick Fertre <yannick.fertre@st.com> - - Christophe Roullier <christophe.roullier@st.com> + - Yannick Fertre <yannick.fertre@foss.st.com> + - Christophe Roullier <christophe.roullier@foss.st.com> allOf: - $ref: "watchdog.yaml#" |