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author | Sascha Hauer <s.hauer@pengutronix.de> | 2016-06-13 07:29:57 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-06-13 07:29:57 +0200 |
commit | a4f4bc65b33164eb8c19bcff9834cc87bcc845bb (patch) | |
tree | ef97762be5b614f160e9affddd1bbbec43c007dc /dts/Bindings/watchdog | |
parent | 83e61900b02965d01f0885e2db2077df35be7f56 (diff) | |
download | barebox-a4f4bc65b33164eb8c19bcff9834cc87bcc845bb.tar.gz barebox-a4f4bc65b33164eb8c19bcff9834cc87bcc845bb.tar.xz |
dts: update to v4.6-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/Bindings/watchdog')
-rw-r--r-- | dts/Bindings/watchdog/arm,sp805.txt | 17 | ||||
-rw-r--r-- | dts/Bindings/watchdog/sbsa-gwdt.txt | 31 |
2 files changed, 48 insertions, 0 deletions
diff --git a/dts/Bindings/watchdog/arm,sp805.txt b/dts/Bindings/watchdog/arm,sp805.txt new file mode 100644 index 0000000000..ca99d64e62 --- /dev/null +++ b/dts/Bindings/watchdog/arm,sp805.txt @@ -0,0 +1,17 @@ +ARM AMBA Primecell SP805 Watchdog + +Required properties: +- compatible: Should be "arm,sp805" & "arm,primecell" +- reg: Should contain location and length for watchdog timer register. +- interrupts: Should contain the list of watchdog timer interrupts. +- clocks: clocks driving the watchdog timer hardware. This list should be 2 + clocks. With 2 clocks, the order is wdogclk clock, apb_pclk. + +Example: + watchdog@66090000 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0x66090000 0x1000>; + interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&apb_pclk>,<&apb_pclk>; + clock-names = "wdogclk", "apb_pclk"; + }; diff --git a/dts/Bindings/watchdog/sbsa-gwdt.txt b/dts/Bindings/watchdog/sbsa-gwdt.txt new file mode 100644 index 0000000000..6f2d5f9196 --- /dev/null +++ b/dts/Bindings/watchdog/sbsa-gwdt.txt @@ -0,0 +1,31 @@ +* SBSA (Server Base System Architecture) Generic Watchdog + +The SBSA Generic Watchdog Timer is used to force a reset of the system +after two stages of timeout have elapsed. A detailed definition of the +watchdog timer can be found in the ARM document: ARM-DEN-0029 - Server +Base System Architecture (SBSA) + +Required properties: +- compatible: Should at least contain "arm,sbsa-gwdt". + +- reg: Each entry specifies the base physical address of a register frame + and the length of that frame; currently, two frames must be defined, + in this order: + 1: Watchdog control frame; + 2: Refresh frame. + +- interrupts: Should contain the Watchdog Signal 0 (WS0) SPI (Shared + Peripheral Interrupt) number of SBSA Generic Watchdog. + +Optional properties +- timeout-sec: Watchdog timeout values (in seconds). + +Example for FVP Foundation Model v8: + +watchdog@2a440000 { + compatible = "arm,sbsa-gwdt"; + reg = <0x0 0x2a440000 0 0x1000>, + <0x0 0x2a450000 0 0x1000>; + interrupts = <0 27 4>; + timeout-sec = <30>; +}; |