summaryrefslogtreecommitdiffstats
path: root/dts/include/dt-bindings/clock/exynos850.h
diff options
context:
space:
mode:
authorSascha Hauer <s.hauer@pengutronix.de>2023-05-16 16:08:08 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2023-05-16 16:08:08 +0200
commit957f21e07e24d8ec3488e28411ff673d68fe2463 (patch)
tree16e3d5e0feb07b31533767fefe8ff15a5c700f92 /dts/include/dt-bindings/clock/exynos850.h
parent71d9e614909240f6660a5d850a20ebbbe64f5f32 (diff)
downloadbarebox-957f21e07e24d8ec3488e28411ff673d68fe2463.tar.gz
barebox-957f21e07e24d8ec3488e28411ff673d68fe2463.tar.xz
dts: update to v6.4-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/include/dt-bindings/clock/exynos850.h')
-rw-r--r--dts/include/dt-bindings/clock/exynos850.h28
1 files changed, 25 insertions, 3 deletions
diff --git a/dts/include/dt-bindings/clock/exynos850.h b/dts/include/dt-bindings/clock/exynos850.h
index 88d5289883..afacba338c 100644
--- a/dts/include/dt-bindings/clock/exynos850.h
+++ b/dts/include/dt-bindings/clock/exynos850.h
@@ -85,7 +85,10 @@
#define CLK_DOUT_MFCMSCL_M2M 73
#define CLK_DOUT_MFCMSCL_MCSC 74
#define CLK_DOUT_MFCMSCL_JPEG 75
-#define TOP_NR_CLK 76
+#define CLK_MOUT_G3D_SWITCH 76
+#define CLK_GOUT_G3D_SWITCH 77
+#define CLK_DOUT_G3D_SWITCH 78
+#define TOP_NR_CLK 79
/* CMU_APM */
#define CLK_RCO_I3C_PMIC 1
@@ -175,7 +178,8 @@
#define IOCLK_AUDIOCDCLK5 58
#define IOCLK_AUDIOCDCLK6 59
#define TICK_USB 60
-#define AUD_NR_CLK 61
+#define CLK_GOUT_AUD_CMU_AUD_PCLK 61
+#define AUD_NR_CLK 62
/* CMU_CMGP */
#define CLK_RCO_CMGP 1
@@ -195,6 +199,21 @@
#define CLK_GOUT_SYSREG_CMGP_PCLK 15
#define CMGP_NR_CLK 16
+/* CMU_G3D */
+#define CLK_FOUT_G3D_PLL 1
+#define CLK_MOUT_G3D_PLL 2
+#define CLK_MOUT_G3D_SWITCH_USER 3
+#define CLK_MOUT_G3D_BUSD 4
+#define CLK_DOUT_G3D_BUSP 5
+#define CLK_GOUT_G3D_CMU_G3D_PCLK 6
+#define CLK_GOUT_G3D_GPU_CLK 7
+#define CLK_GOUT_G3D_TZPC_PCLK 8
+#define CLK_GOUT_G3D_GRAY2BIN_CLK 9
+#define CLK_GOUT_G3D_BUSD_CLK 10
+#define CLK_GOUT_G3D_BUSP_CLK 11
+#define CLK_GOUT_G3D_SYSREG_PCLK 12
+#define G3D_NR_CLK 13
+
/* CMU_HSI */
#define CLK_MOUT_HSI_BUS_USER 1
#define CLK_MOUT_HSI_MMC_CARD_USER 2
@@ -209,7 +228,10 @@
#define CLK_GOUT_MMC_CARD_ACLK 11
#define CLK_GOUT_MMC_CARD_SDCLKIN 12
#define CLK_GOUT_SYSREG_HSI_PCLK 13
-#define HSI_NR_CLK 14
+#define CLK_GOUT_HSI_PPMU_ACLK 14
+#define CLK_GOUT_HSI_PPMU_PCLK 15
+#define CLK_GOUT_HSI_CMU_HSI_PCLK 16
+#define HSI_NR_CLK 17
/* CMU_IS */
#define CLK_MOUT_IS_BUS_USER 1