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authorSascha Hauer <s.hauer@pengutronix.de>2014-09-01 09:47:17 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2014-09-02 11:01:29 +0200
commita595ff6eea05b919567f96d71e7e2c7b6236b8ac (patch)
tree2d7cea529b6a06be744116e29e8a97b0c8de1981 /dts/include/dt-bindings/clock/rk3188-cru.h
parent7955f4315187665690f51e20698d4c12c68e008f (diff)
downloadbarebox-a595ff6eea05b919567f96d71e7e2c7b6236b8ac.tar.gz
barebox-a595ff6eea05b919567f96d71e7e2c7b6236b8ac.tar.xz
dts: update to v3.17-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/include/dt-bindings/clock/rk3188-cru.h')
-rw-r--r--dts/include/dt-bindings/clock/rk3188-cru.h51
1 files changed, 51 insertions, 0 deletions
diff --git a/dts/include/dt-bindings/clock/rk3188-cru.h b/dts/include/dt-bindings/clock/rk3188-cru.h
new file mode 100644
index 0000000000..9fac8edd3f
--- /dev/null
+++ b/dts/include/dt-bindings/clock/rk3188-cru.h
@@ -0,0 +1,51 @@
+/*
+ * Copyright (c) 2014 MundoReader S.L.
+ * Author: Heiko Stuebner <heiko@sntech.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <dt-bindings/clock/rk3188-cru-common.h>
+
+/* soft-reset indices */
+#define SRST_PTM_CORE2 0
+#define SRST_PTM_CORE3 1
+#define SRST_CORE2 5
+#define SRST_CORE3 6
+#define SRST_CORE2_DBG 10
+#define SRST_CORE3_DBG 11
+
+#define SRST_TIMER2 16
+#define SRST_TIMER4 23
+#define SRST_I2S0 24
+#define SRST_TIMER5 25
+#define SRST_TIMER3 29
+#define SRST_TIMER6 31
+
+#define SRST_PTM3 36
+#define SRST_PTM3_ATB 37
+
+#define SRST_GPS 67
+#define SRST_HSICPHY 75
+#define SRST_TIMER 78
+
+#define SRST_PTM2 92
+#define SRST_CORE2_WDT 94
+#define SRST_CORE3_WDT 95
+
+#define SRST_PTM2_ATB 111
+
+#define SRST_HSIC 117
+#define SRST_CTI2 118
+#define SRST_CTI2_APB 119
+#define SRST_GPU_BRIDGE 121
+#define SRST_CTI3 123
+#define SRST_CTI3_APB 124