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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-01-11 16:20:46 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-01-11 16:20:46 +0100 |
| commit | 2ab5d62d038d22f343e472a406d113706915f5c1 (patch) | |
| tree | 3a54748bf06cf976cd039cecb9e95e740d6d5e91 /dts/src/arc/axc003_idu.dtsi | |
| parent | 17fa36cd7d892cd083c1978a88a0f1de85264ee6 (diff) | |
| download | barebox-2ab5d62d038d22f343e472a406d113706915f5c1.tar.gz barebox-2ab5d62d038d22f343e472a406d113706915f5c1.tar.xz | |
dts: update to v4.15-rc7
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arc/axc003_idu.dtsi')
| -rw-r--r-- | dts/src/arc/axc003_idu.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/dts/src/arc/axc003_idu.dtsi b/dts/src/arc/axc003_idu.dtsi index 63954a8b01..69ff4895f2 100644 --- a/dts/src/arc/axc003_idu.dtsi +++ b/dts/src/arc/axc003_idu.dtsi @@ -35,6 +35,14 @@ reg = <0x80 0x10>, <0x100 0x10>; #clock-cells = <0>; clocks = <&input_clk>; + + /* + * Set initial core pll output frequency to 100MHz. + * It will be applied at the core pll driver probing + * on early boot. + */ + assigned-clocks = <&core_clk>; + assigned-clock-rates = <100000000>; }; core_intc: archs-intc@cpu { |