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author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-07-08 14:44:21 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-07-08 14:44:21 +0200 |
commit | 87360e3dd42bb627a9f2611f961728c0789e1c21 (patch) | |
tree | afefc88c862d9feafb0cdb075badeb8d32d8efd2 /dts/src/arc/vdk_axc003.dtsi | |
parent | 80936d6aaeea1b10ce4eb81c54eece2f55f8e209 (diff) | |
download | barebox-87360e3dd42bb627a9f2611f961728c0789e1c21.tar.gz barebox-87360e3dd42bb627a9f2611f961728c0789e1c21.tar.xz |
dts: update to v4.2-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arc/vdk_axc003.dtsi')
-rw-r--r-- | dts/src/arc/vdk_axc003.dtsi | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/dts/src/arc/vdk_axc003.dtsi b/dts/src/arc/vdk_axc003.dtsi new file mode 100644 index 0000000000..9393fd902f --- /dev/null +++ b/dts/src/arc/vdk_axc003.dtsi @@ -0,0 +1,61 @@ +/* + * Copyright (C) 2013, 2014 Synopsys, Inc. (www.synopsys.com) + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * Device tree for AXC003 CPU card: HS38x UP configuration (VDK version) + */ + +/ { + compatible = "snps,arc"; + clock-frequency = <50000000>; + #address-cells = <1>; + #size-cells = <1>; + + cpu_card { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <1>; + + ranges = <0x00000000 0xf0000000 0x10000000>; + + cpu_intc: archs-intc@cpu { + compatible = "snps,archs-intc"; + interrupt-controller; + #interrupt-cells = <1>; + }; + + debug_uart: dw-apb-uart@0x5000 { + compatible = "snps,dw-apb-uart"; + reg = <0x5000 0x100>; + clock-frequency = <2403200>; + interrupt-parent = <&cpu_intc>; + interrupts = <19>; + baud = <115200>; + reg-shift = <2>; + reg-io-width = <4>; + }; + + }; + + mb_intc: dw-apb-ictl@0xe0012000 { + #interrupt-cells = <1>; + compatible = "snps,dw-apb-ictl"; + reg = < 0xe0012000 0x200 >; + interrupt-controller; + interrupt-parent = <&cpu_intc>; + interrupts = < 18 >; + }; + + memory { + #address-cells = <1>; + #size-cells = <1>; + ranges = <0x00000000 0x80000000 0x40000000>; + device_type = "memory"; + reg = <0x00000000 0x20000000>; /* 512MiB */ + }; +}; |