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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-06-17 22:16:07 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-06-19 09:41:51 +0200 |
| commit | 9313920df6d3d55fbd03ce8ec1c0da9a10c29824 (patch) | |
| tree | ef80d80abbaf46293b777ead52caddd9d5d97644 /dts/src/arm/am33xx-clocks.dtsi | |
| parent | 83e875e1f45beffe399cff0ff6128e0fca9da168 (diff) | |
| download | barebox-9313920df6d3d55fbd03ce8ec1c0da9a10c29824.tar.gz barebox-9313920df6d3d55fbd03ce8ec1c0da9a10c29824.tar.xz | |
dts: update to v3.16-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/am33xx-clocks.dtsi')
| -rw-r--r-- | dts/src/arm/am33xx-clocks.dtsi | 30 |
1 files changed, 6 insertions, 24 deletions
diff --git a/dts/src/arm/am33xx-clocks.dtsi b/dts/src/arm/am33xx-clocks.dtsi index 9ccfe508de..712edce7d6 100644 --- a/dts/src/arm/am33xx-clocks.dtsi +++ b/dts/src/arm/am33xx-clocks.dtsi @@ -96,47 +96,29 @@ clock-div = <1>; }; - ehrpwm0_gate_tbclk: ehrpwm0_gate_tbclk { + ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 { #clock-cells = <0>; - compatible = "ti,composite-no-wait-gate-clock"; + compatible = "ti,gate-clock"; clocks = <&dpll_per_m2_ck>; ti,bit-shift = <0>; reg = <0x0664>; }; - ehrpwm0_tbclk: ehrpwm0_tbclk { - #clock-cells = <0>; - compatible = "ti,composite-clock"; - clocks = <&ehrpwm0_gate_tbclk>; - }; - - ehrpwm1_gate_tbclk: ehrpwm1_gate_tbclk { + ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 { #clock-cells = <0>; - compatible = "ti,composite-no-wait-gate-clock"; + compatible = "ti,gate-clock"; clocks = <&dpll_per_m2_ck>; ti,bit-shift = <1>; reg = <0x0664>; }; - ehrpwm1_tbclk: ehrpwm1_tbclk { - #clock-cells = <0>; - compatible = "ti,composite-clock"; - clocks = <&ehrpwm1_gate_tbclk>; - }; - - ehrpwm2_gate_tbclk: ehrpwm2_gate_tbclk { + ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 { #clock-cells = <0>; - compatible = "ti,composite-no-wait-gate-clock"; + compatible = "ti,gate-clock"; clocks = <&dpll_per_m2_ck>; ti,bit-shift = <2>; reg = <0x0664>; }; - - ehrpwm2_tbclk: ehrpwm2_tbclk { - #clock-cells = <0>; - compatible = "ti,composite-clock"; - clocks = <&ehrpwm2_gate_tbclk>; - }; }; &prcm_clocks { clk_32768_ck: clk_32768_ck { |