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author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-05-14 07:10:49 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-05-14 07:10:49 +0200 |
commit | e4ea8e8bfa7a37fea2d97c3d268206417e196bdf (patch) | |
tree | 44e2513021a45b23fdd897ab91e3588101e7e844 /dts/src/arm/bcm2711-rpi-4-b.dts | |
parent | 9859cb41d7d737852d3334d33c6d2c2c9bbc75c6 (diff) | |
parent | 65aeb63c89e7b4e701ff1b1880818197b162d9e6 (diff) | |
download | barebox-e4ea8e8bfa7a37fea2d97c3d268206417e196bdf.tar.gz barebox-e4ea8e8bfa7a37fea2d97c3d268206417e196bdf.tar.xz |
Merge branch 'for-next/dts'
Diffstat (limited to 'dts/src/arm/bcm2711-rpi-4-b.dts')
-rw-r--r-- | dts/src/arm/bcm2711-rpi-4-b.dts | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/dts/src/arm/bcm2711-rpi-4-b.dts b/dts/src/arm/bcm2711-rpi-4-b.dts index efea891b1a..e26ea90063 100644 --- a/dts/src/arm/bcm2711-rpi-4-b.dts +++ b/dts/src/arm/bcm2711-rpi-4-b.dts @@ -20,6 +20,7 @@ }; aliases { + emmc2bus = &emmc2bus; ethernet0 = &genet; pcie0 = &pcie0; }; @@ -74,6 +75,79 @@ }; }; +&gpio { + /* + * Parts taken from rpi_SCH_4b_4p0_reduced.pdf and + * the official GPU firmware DT blob. + * + * Legend: + * "FOO" = GPIO line named "FOO" on the schematic + * "FOO_N" = GPIO line named "FOO" on schematic, active low + */ + gpio-line-names = "ID_SDA", + "ID_SCL", + "SDA1", + "SCL1", + "GPIO_GCLK", + "GPIO5", + "GPIO6", + "SPI_CE1_N", + "SPI_CE0_N", + "SPI_MISO", + "SPI_MOSI", + "SPI_SCLK", + "GPIO12", + "GPIO13", + /* Serial port */ + "TXD1", + "RXD1", + "GPIO16", + "GPIO17", + "GPIO18", + "GPIO19", + "GPIO20", + "GPIO21", + "GPIO22", + "GPIO23", + "GPIO24", + "GPIO25", + "GPIO26", + "GPIO27", + "RGMII_MDIO", + "RGMIO_MDC", + /* Used by BT module */ + "CTS0", + "RTS0", + "TXD0", + "RXD0", + /* Used by Wifi */ + "SD1_CLK", + "SD1_CMD", + "SD1_DATA0", + "SD1_DATA1", + "SD1_DATA2", + "SD1_DATA3", + /* Shared with SPI flash */ + "PWM0_MISO", + "PWM1_MOSI", + "STATUS_LED_G_CLK", + "SPIFLASH_CE_N", + "SDA0", + "SCL0", + "RGMII_RXCLK", + "RGMII_RXCTL", + "RGMII_RXD0", + "RGMII_RXD1", + "RGMII_RXD2", + "RGMII_RXD3", + "RGMII_TXCLK", + "RGMII_TXCTL", + "RGMII_TXD0", + "RGMII_TXD1", + "RGMII_TXD2", + "RGMII_TXD3"; +}; + &pwm1 { pinctrl-names = "default"; pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>; |