summaryrefslogtreecommitdiffstats
path: root/dts/src/arm/exynos3250.dtsi
diff options
context:
space:
mode:
authorSascha Hauer <s.hauer@pengutronix.de>2020-08-17 08:16:38 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2020-08-17 09:51:44 +0200
commit0c2e2b7d8fd795c24abc7bfd3752eb3e366155eb (patch)
tree21cddf4b49891b7df21cbe5e5dd358d4e44e031d /dts/src/arm/exynos3250.dtsi
parent8ef08db9ad225acbf7326493cc586bb14fd917f5 (diff)
downloadbarebox-0c2e2b7d8fd795c24abc7bfd3752eb3e366155eb.tar.gz
barebox-0c2e2b7d8fd795c24abc7bfd3752eb3e366155eb.tar.xz
dts: update to v5.9-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/exynos3250.dtsi')
-rw-r--r--dts/src/arm/exynos3250.dtsi47
1 files changed, 20 insertions, 27 deletions
diff --git a/dts/src/arm/exynos3250.dtsi b/dts/src/arm/exynos3250.dtsi
index 044e5da64a..d3fb45a565 100644
--- a/dts/src/arm/exynos3250.dtsi
+++ b/dts/src/arm/exynos3250.dtsi
@@ -418,33 +418,26 @@
status = "disabled";
};
- amba {
- compatible = "simple-bus";
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
-
- pdma0: pdma@12680000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x12680000 0x1000>;
- interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cmu CLK_PDMA0>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
-
- pdma1: pdma@12690000 {
- compatible = "arm,pl330", "arm,primecell";
- reg = <0x12690000 0x1000>;
- interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
- clocks = <&cmu CLK_PDMA1>;
- clock-names = "apb_pclk";
- #dma-cells = <1>;
- #dma-channels = <8>;
- #dma-requests = <32>;
- };
+ pdma0: pdma@12680000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x12680000 0x1000>;
+ interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu CLK_PDMA0>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
+ };
+
+ pdma1: pdma@12690000 {
+ compatible = "arm,pl330", "arm,primecell";
+ reg = <0x12690000 0x1000>;
+ interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cmu CLK_PDMA1>;
+ clock-names = "apb_pclk";
+ #dma-cells = <1>;
+ #dma-channels = <8>;
+ #dma-requests = <32>;
};
adc: adc@126c0000 {