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authorSascha Hauer <s.hauer@pengutronix.de>2018-02-27 09:40:19 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2018-03-01 14:29:51 +0100
commita9c5f6b9ec883ee9dafd6d393600acc6fd263043 (patch)
tree35621cff332a0c95509b04b2e4170f0eda1f0ecf /dts/src/arm/exynos5420-cpus.dtsi
parent5ba0e42cb24afdf59d48930daf495c148312fc67 (diff)
downloadbarebox-a9c5f6b9ec883ee9dafd6d393600acc6fd263043.tar.gz
barebox-a9c5f6b9ec883ee9dafd6d393600acc6fd263043.tar.xz
dts: update to v4.16-rc1
Also includeded: ARM: dts: am33xx: do not delete no longer existing clocks Several clocks are removed from the am33xx dts files with v4.16-rc1. Remove the corresponding /delete-node/ directives aswell to avoid dtc breakage. Also included: ARM: dts: imx6qdl: SolidRun: Fix upstream include Upstream dts file way renamed, so change include name accordingly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/exynos5420-cpus.dtsi')
-rw-r--r--dts/src/arm/exynos5420-cpus.dtsi15
1 files changed, 11 insertions, 4 deletions
diff --git a/dts/src/arm/exynos5420-cpus.dtsi b/dts/src/arm/exynos5420-cpus.dtsi
index d7d703aa16..123f0cef65 100644
--- a/dts/src/arm/exynos5420-cpus.dtsi
+++ b/dts/src/arm/exynos5420-cpus.dtsi
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* SAMSUNG EXYNOS5420 SoC cpu device tree source
*
@@ -14,10 +15,6 @@
* booting cluster (big or LITTLE) is chosen by IROM code by reading
* the gpg2-1 GPIO. By default all Exynos5422 based boards choose booting
* from the LITTLE: Cortex-A7.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
/ {
@@ -132,3 +129,13 @@
};
};
};
+
+&arm_a7_pmu {
+ interrupt-affinity = <&cpu4>, <&cpu5>, <&cpu6>, <&cpu7>;
+ status = "okay";
+};
+
+&arm_a15_pmu {
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
+ status = "okay";
+};