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author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-05-14 07:10:49 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-05-14 07:10:49 +0200 |
commit | e4ea8e8bfa7a37fea2d97c3d268206417e196bdf (patch) | |
tree | 44e2513021a45b23fdd897ab91e3588101e7e844 /dts/src/arm/imx6sll.dtsi | |
parent | 9859cb41d7d737852d3334d33c6d2c2c9bbc75c6 (diff) | |
parent | 65aeb63c89e7b4e701ff1b1880818197b162d9e6 (diff) | |
download | barebox-e4ea8e8bfa7a37fea2d97c3d268206417e196bdf.tar.gz barebox-e4ea8e8bfa7a37fea2d97c3d268206417e196bdf.tar.xz |
Merge branch 'for-next/dts'
Diffstat (limited to 'dts/src/arm/imx6sll.dtsi')
-rw-r--r-- | dts/src/arm/imx6sll.dtsi | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/dts/src/arm/imx6sll.dtsi b/dts/src/arm/imx6sll.dtsi index a1bc5bb317..edd3abb9a9 100644 --- a/dts/src/arm/imx6sll.dtsi +++ b/dts/src/arm/imx6sll.dtsi @@ -72,6 +72,8 @@ <&clks IMX6SLL_CLK_PLL1_SYS>; clock-names = "arm", "pll2_pfd2_396m", "step", "pll1_sw", "pll1_sys"; + nvmem-cells = <&cpu_speed_grade>; + nvmem-cell-names = "speed_grade"; }; }; @@ -144,7 +146,7 @@ arm,data-latency = <4 2 3>; }; - aips1: aips-bus@2000000 { + aips1: bus@2000000 { compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -652,7 +654,7 @@ status = "disabled"; }; - dcp: dcp@20fc000 { + dcp: crypto@20fc000 { compatible = "fsl,imx28-dcp"; reg = <0x020fc000 0x4000>; interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>, @@ -663,7 +665,7 @@ }; }; - aips2: aips-bus@2100000 { + aips2: bus@2100000 { compatible = "fsl,aips-bus", "simple-bus"; #address-cells = <1>; #size-cells = <1>; @@ -791,6 +793,10 @@ reg = <0x021bc000 0x4000>; clocks = <&clks IMX6SLL_CLK_OCOTP>; + cpu_speed_grade: speed-grade@10 { + reg = <0x10 4>; + }; + tempmon_calib: calib@38 { reg = <0x38 4>; }; |