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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2023-07-27 07:08:56 +0200 |
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| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2023-07-27 11:31:04 +0200 |
| commit | 1f2570eb41c8ebc983e97ff0608d77260c2ba16b (patch) | |
| tree | 0ef7f7cfc9a20897cf99497facdeedb6fcfb3a61 /dts/src/arm/imx6ul-opos6uldev.dts | |
| parent | 73ead6c5b1ee1ca8c7c83cec1864624b220a0c06 (diff) | |
| download | barebox-1f2570eb41c8ebc983e97ff0608d77260c2ba16b.tar.gz barebox-1f2570eb41c8ebc983e97ff0608d77260c2ba16b.tar.xz | |
dts: update to v6.5-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/imx6ul-opos6uldev.dts')
| -rw-r--r-- | dts/src/arm/imx6ul-opos6uldev.dts | 41 |
1 files changed, 0 insertions, 41 deletions
diff --git a/dts/src/arm/imx6ul-opos6uldev.dts b/dts/src/arm/imx6ul-opos6uldev.dts deleted file mode 100644 index 375b98d720..0000000000 --- a/dts/src/arm/imx6ul-opos6uldev.dts +++ /dev/null @@ -1,41 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 OR MIT -// -// Copyright 2017 Armadeus Systems <support@armadeus.com> - -/dts-v1/; -#include "imx6ul-opos6ul.dtsi" -#include "imx6ul-imx6ull-opos6uldev.dtsi" - -/ { - model = "Armadeus Systems OPOS6UL SoM (i.MX6UL) on OPOS6ULDev board"; - compatible = "armadeus,imx6ul-opos6uldev", "armadeus,imx6ul-opos6ul", "fsl,imx6ul"; -}; - -&iomuxc { - pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_tamper_gpios>; - - pinctrl_tamper_gpios: tampergpiosgrp { - fsl,pins = < - MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0b0b0 - MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0 - MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0 - MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0 - MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0 - MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0b0b0 - MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0b0b0 - MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0b0b0 - >; - }; - - pinctrl_usbotg2_vbus: usbotg2vbusgrp { - fsl,pins = < - MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0 - >; - }; - - pinctrl_w1: w1grp { - fsl,pins = < - MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0 - >; - }; -}; |