diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2016-06-13 07:31:46 +0200 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-06-13 12:43:53 +0200 |
commit | 86186c232241b607f84cc266a6cda49160f44948 (patch) | |
tree | 286a87dae7f2d8c3eda5b8551fc9b5f4db726c45 /dts/src/arm/lpc18xx.dtsi | |
parent | 0cf29e11efa66ad4515c9391303406c725be2c7a (diff) | |
download | barebox-86186c232241b607f84cc266a6cda49160f44948.tar.gz barebox-86186c232241b607f84cc266a6cda49160f44948.tar.xz |
dts: update to v4.7-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/lpc18xx.dtsi')
-rw-r--r-- | dts/src/arm/lpc18xx.dtsi | 47 |
1 files changed, 44 insertions, 3 deletions
diff --git a/dts/src/arm/lpc18xx.dtsi b/dts/src/arm/lpc18xx.dtsi index 053a1f54f4..fdb736c820 100644 --- a/dts/src/arm/lpc18xx.dtsi +++ b/dts/src/arm/lpc18xx.dtsi @@ -195,13 +195,19 @@ clocks = <&ccu1 CLK_CPU_CREG>; resets = <&rgu 5>; - usb0_otg_phy: phy@004 { + creg_clk: clock-controller { + compatible = "nxp,lpc1850-creg-clk"; + clocks = <&xtal32>; + #clock-cells = <1>; + }; + + usb0_otg_phy: phy { compatible = "nxp,lpc1850-usb-otg-phy"; clocks = <&ccu1 CLK_USB0>; #phy-cells = <0>; }; - dmamux: dma-mux@11c { + dmamux: dma-mux { compatible = "nxp,lpc1850-dmamux"; #dma-cells = <3>; dma-requests = <64>; @@ -209,11 +215,19 @@ }; }; + rtc: rtc@40046000 { + compatible = "nxp,lpc1850-rtc", "nxp,lpc1788-rtc"; + reg = <0x40046000 0x1000>; + interrupts = <47>; + clocks = <&creg_clk 0>, <&ccu1 CLK_CPU_BUS>; + clock-names = "rtc", "reg"; + }; + cgu: clock-controller@40050000 { compatible = "nxp,lpc1850-cgu"; reg = <0x40050000 0x1000>; #clock-cells = <1>; - clocks = <&xtal>, <&xtal32>, <&enet_rx_clk>, <&enet_tx_clk>, <&gp_clkin>; + clocks = <&xtal>, <&creg_clk 1>, <&enet_rx_clk>, <&enet_tx_clk>, <&gp_clkin>; }; ccu1: clock-controller@40051000 { @@ -430,6 +444,15 @@ status = "disabled"; }; + dac: dac@400e1000 { + compatible = "nxp,lpc1850-dac"; + reg = <0x400e1000 0x1000>; + interrupts = <0>; + clocks = <&ccu1 CLK_APB3_DAC>; + resets = <&rgu 42>; + status = "disabled"; + }; + can0: can@400e2000 { compatible = "bosch,c_can"; reg = <0x400e2000 0x1000>; @@ -439,6 +462,24 @@ status = "disabled"; }; + adc0: adc@400e3000 { + compatible = "nxp,lpc1850-adc"; + reg = <0x400e3000 0x1000>; + interrupts = <17>; + clocks = <&ccu1 CLK_APB3_ADC0>; + resets = <&rgu 40>; + status = "disabled"; + }; + + adc1: adc@400e4000 { + compatible = "nxp,lpc1850-adc"; + reg = <0x400e4000 0x1000>; + interrupts = <21>; + clocks = <&ccu1 CLK_APB3_ADC1>; + resets = <&rgu 41>; + status = "disabled"; + }; + gpio: gpio@400f4000 { compatible = "nxp,lpc1850-gpio"; reg = <0x400f4000 0x4000>; |