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authorSascha Hauer <s.hauer@pengutronix.de>2018-02-27 09:40:19 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2018-03-01 14:29:51 +0100
commita9c5f6b9ec883ee9dafd6d393600acc6fd263043 (patch)
tree35621cff332a0c95509b04b2e4170f0eda1f0ecf /dts/src/arm/omap5.dtsi
parent5ba0e42cb24afdf59d48930daf495c148312fc67 (diff)
downloadbarebox-a9c5f6b9ec883ee9dafd6d393600acc6fd263043.tar.gz
dts: update to v4.16-rc1
Also includeded: ARM: dts: am33xx: do not delete no longer existing clocks Several clocks are removed from the am33xx dts files with v4.16-rc1. Remove the corresponding /delete-node/ directives aswell to avoid dtc breakage. Also included: ARM: dts: imx6qdl: SolidRun: Fix upstream include Upstream dts file way renamed, so change include name accordingly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/omap5.dtsi')
-rw-r--r--dts/src/arm/omap5.dtsi46
1 files changed, 32 insertions, 14 deletions
diff --git a/dts/src/arm/omap5.dtsi b/dts/src/arm/omap5.dtsi
index 51a7fb3..35d4298 100644
--- a/dts/src/arm/omap5.dtsi
+++ b/dts/src/arm/omap5.dtsi
@@ -10,6 +10,7 @@
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/omap.h>
+#include <dt-bindings/clock/omap5.h>
/ {
#address-cells = <2>;
@@ -201,8 +202,12 @@
};
cm_core_aon: cm_core_aon@4000 {
- compatible = "ti,omap5-cm-core-aon";
+ compatible = "ti,omap5-cm-core-aon",
+ "simple-bus";
reg = <0x4000 0x2000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x4000 0x2000>;
cm_core_aon_clocks: clocks {
#address-cells = <1>;
@@ -214,8 +219,11 @@
};
cm_core: cm_core@8000 {
- compatible = "ti,omap5-cm-core";
+ compatible = "ti,omap5-cm-core", "simple-bus";
reg = <0x8000 0x3000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x8000 0x3000>;
cm_core_clocks: clocks {
#address-cells = <1>;
@@ -240,9 +248,12 @@
};
prm: prm@6000 {
- compatible = "ti,omap5-prm";
+ compatible = "ti,omap5-prm", "simple-bus";
reg = <0x6000 0x3000>;
interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges = <0 0x6000 0x3000>;
prm_clocks: clocks {
#address-cells = <1>;
@@ -734,6 +745,8 @@
interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "timer1";
ti,timer-alwon;
+ clocks = <&wkupaon_clkctrl OMAP5_TIMER1_CLKCTRL 24>;
+ clock-names = "fck";
};
timer2: timer@48032000 {
@@ -893,7 +906,8 @@
compatible = "ti,omap-usb2";
reg = <0x4a084000 0x7c>;
syscon-phy-power = <&scm_conf 0x300>;
- clocks = <&usb_phy_cm_clk32k>, <&usb_otg_ss_refclk960m>;
+ clocks = <&usb_phy_cm_clk32k>,
+ <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>;
clock-names = "wkupclk", "refclk";
#phy-cells = <0>;
};
@@ -907,7 +921,7 @@
syscon-phy-power = <&scm_conf 0x370>;
clocks = <&usb_phy_cm_clk32k>,
<&sys_clkin>,
- <&usb_otg_ss_refclk960m>;
+ <&l3init_clkctrl OMAP5_USB_OTG_SS_CLKCTRL 8>;
clock-names = "wkupclk",
"sysclk",
"refclk";
@@ -976,7 +990,8 @@
<0x4A096800 0x40>; /* pll_ctrl */
reg-names = "phy_rx", "phy_tx", "pll_ctrl";
syscon-phy-power = <&scm_conf 0x374>;
- clocks = <&sys_clkin>, <&sata_ref_clk>;
+ clocks = <&sys_clkin>,
+ <&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>;
clock-names = "sysclk", "refclk";
#phy-cells = <0>;
};
@@ -988,7 +1003,7 @@
interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>;
phys = <&sata_phy>;
phy-names = "sata-phy";
- clocks = <&sata_ref_clk>;
+ clocks = <&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>;
ti,hwmods = "sata";
ports-implemented = <0x1>;
};
@@ -998,7 +1013,7 @@
reg = <0x58000000 0x80>;
status = "disabled";
ti,hwmods = "dss_core";
- clocks = <&dss_dss_clk>;
+ clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>;
clock-names = "fck";
#address-cells = <1>;
#size-cells = <1>;
@@ -1009,7 +1024,7 @@
reg = <0x58001000 0x1000>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
ti,hwmods = "dss_dispc";
- clocks = <&dss_dss_clk>;
+ clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>;
clock-names = "fck";
};
@@ -1018,7 +1033,7 @@
reg = <0x58002000 0x100>;
status = "disabled";
ti,hwmods = "dss_rfbi";
- clocks = <&dss_dss_clk>, <&l3_iclk_div>;
+ clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>, <&l3_iclk_div>;
clock-names = "fck", "ick";
};
@@ -1031,7 +1046,8 @@
interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
ti,hwmods = "dss_dsi1";
- clocks = <&dss_dss_clk>, <&dss_sys_clk>;
+ clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>,
+ <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>;
clock-names = "fck", "sys_clk";
};
@@ -1044,7 +1060,8 @@
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
ti,hwmods = "dss_dsi2";
- clocks = <&dss_dss_clk>, <&dss_sys_clk>;
+ clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 8>,
+ <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>;
clock-names = "fck", "sys_clk";
};
@@ -1058,7 +1075,8 @@
interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
status = "disabled";
ti,hwmods = "dss_hdmi";
- clocks = <&dss_48mhz_clk>, <&dss_sys_clk>;
+ clocks = <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 9>,
+ <&dss_clkctrl OMAP5_DSS_CORE_CLKCTRL 10>;
clock-names = "fck", "sys_clk";
dmas = <&sdma 76>;
dma-names = "audio_tx";
@@ -1132,7 +1150,7 @@
coefficients = <65 (-1791)>;
};
-/include/ "omap54xx-clocks.dtsi"
+#include "omap54xx-clocks.dtsi"
&gpu_thermal {
coefficients = <117 (-2992)>;