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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2015-02-09 08:45:25 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-02-11 09:50:08 +0100 |
| commit | ab001302c8e1718110bb8839c270d2caa817b214 (patch) | |
| tree | f5ab4feb5242e548917c3536b8510080df9a4e8f /dts/src/arm/prima2.dtsi | |
| parent | c937ef5d34ede89ae382cfe6d98ba366859a65af (diff) | |
| download | barebox-ab001302c8e1718110bb8839c270d2caa817b214.tar.gz barebox-ab001302c8e1718110bb8839c270d2caa817b214.tar.xz | |
dts: update to v3.19-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/prima2.dtsi')
| -rw-r--r-- | dts/src/arm/prima2.dtsi | 33 |
1 files changed, 33 insertions, 0 deletions
diff --git a/dts/src/arm/prima2.dtsi b/dts/src/arm/prima2.dtsi index 963b7e54ab..1ca1a9aa95 100644 --- a/dts/src/arm/prima2.dtsi +++ b/dts/src/arm/prima2.dtsi @@ -41,6 +41,11 @@ }; }; + arm-pmu { + compatible = "arm,cortex-a9-pmu"; + interrupts = <29>; + }; + axi { compatible = "simple-bus"; #address-cells = <1>; @@ -132,6 +137,7 @@ reg = <0x90020000 0x10000>; interrupts = <31>; clocks = <&clks 35>; + resets = <&rstc 6>; }; }; @@ -173,6 +179,7 @@ compatible = "sirf,prima2-dspif"; reg = <0xa8000000 0x10000>; interrupts = <9>; + resets = <&rstc 1>; }; gps@a8010000 { @@ -180,6 +187,7 @@ reg = <0xa8010000 0x10000>; interrupts = <7>; clocks = <&clks 9>; + resets = <&rstc 2>; }; dsp@a9000000 { @@ -187,6 +195,7 @@ reg = <0xa9000000 0x1000000>; interrupts = <8>; clocks = <&clks 8>; + resets = <&rstc 0>; }; }; @@ -524,12 +533,36 @@ sirf,function = "sdmmc5"; }; }; + i2s_mclk_pins_a: i2s_mclk@0 { + i2s_mclk { + sirf,pins = "i2smclkgrp"; + sirf,function = "i2s_mclk"; + }; + }; + i2s_ext_clk_input_pins_a: i2s_ext_clk_input@0 { + i2s_ext_clk_input { + sirf,pins = "i2s_ext_clk_inputgrp"; + sirf,function = "i2s_ext_clk_input"; + }; + }; i2s_pins_a: i2s@0 { i2s { sirf,pins = "i2sgrp"; sirf,function = "i2s"; }; }; + i2s_no_din_pins_a: i2s_no_din@0 { + i2s_no_din { + sirf,pins = "i2s_no_dingrp"; + sirf,function = "i2s_no_din"; + }; + }; + i2s_6chn_pins_a: i2s_6chn@0 { + i2s_6chn { + sirf,pins = "i2s_6chngrp"; + sirf,function = "i2s_6chn"; + }; + }; ac97_pins_a: ac97@0 { ac97 { sirf,pins = "ac97grp"; |