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authorSascha Hauer <s.hauer@pengutronix.de>2022-11-14 16:54:36 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2022-11-14 16:54:36 +0100
commitab1e21447d0b45d6689a7ddee51a5eadff1ebeeb (patch)
tree2f303011dfe883f8b003fc88eed91568d3fbab88 /dts/src/arm/qcom-msm8660.dtsi
parent082680652836cd17f2e0bb3da5bec35789e93483 (diff)
parent6f98e5463b673e6dcf9a54c1571f95a567b65296 (diff)
downloadbarebox-ab1e21447d0b45d6689a7ddee51a5eadff1ebeeb.tar.gz
barebox-ab1e21447d0b45d6689a7ddee51a5eadff1ebeeb.tar.xz
Merge branch 'for-next/dts'
Diffstat (limited to 'dts/src/arm/qcom-msm8660.dtsi')
-rw-r--r--dts/src/arm/qcom-msm8660.dtsi62
1 files changed, 59 insertions, 3 deletions
diff --git a/dts/src/arm/qcom-msm8660.dtsi b/dts/src/arm/qcom-msm8660.dtsi
index 63a501c63c..ddce7d64ba 100644
--- a/dts/src/arm/qcom-msm8660.dtsi
+++ b/dts/src/arm/qcom-msm8660.dtsi
@@ -50,22 +50,25 @@
};
clocks {
- cxo_board {
+ cxo_board: cxo-board-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <19200000>;
+ clock-output-names = "cxo_board";
};
- pxo_board: pxo_board {
+ pxo_board: pxo-board-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
+ clock-output-names = "pxo_board";
};
- sleep_clk {
+ sleep-clk {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <32768>;
+ clock-output-names = "sleep_clk";
};
};
@@ -129,6 +132,59 @@
#power-domain-cells = <1>;
#reset-cells = <1>;
reg = <0x900000 0x4000>;
+ clocks = <&pxo_board>, <&cxo_board>;
+ clock-names = "pxo", "cxo";
+ };
+
+ gsbi1: gsbi@16000000 {
+ compatible = "qcom,gsbi-v1.0.0";
+ cell-index = <12>;
+ reg = <0x16000000 0x100>;
+ clocks = <&gcc GSBI1_H_CLK>;
+ clock-names = "iface";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ syscon-tcsr = <&tcsr>;
+
+ status = "disabled";
+
+ gsbi1_spi: spi@16080000 {
+ compatible = "qcom,spi-qup-v1.1.1";
+ reg = <0x16080000 0x1000>;
+ interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GSBI1_QUP_CLK>, <&gcc GSBI1_H_CLK>;
+ clock-names = "core", "iface";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+ };
+
+ gsbi3: gsbi@16200000 {
+ compatible = "qcom,gsbi-v1.0.0";
+ cell-index = <12>;
+ reg = <0x16200000 0x100>;
+ clocks = <&gcc GSBI3_H_CLK>;
+ clock-names = "iface";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ syscon-tcsr = <&tcsr>;
+ status = "disabled";
+
+ gsbi3_i2c: i2c@16280000 {
+ compatible = "qcom,i2c-qup-v1.1.1";
+ reg = <0x16280000 0x1000>;
+ interrupts = <GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GSBI3_QUP_CLK>, <&gcc GSBI3_H_CLK>;
+ clock-names = "core", "iface";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
};
gsbi6: gsbi@16500000 {