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authorSascha Hauer <s.hauer@pengutronix.de>2022-04-12 10:22:44 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2022-04-14 09:33:24 +0200
commitb01786baa849369ff2345c51e63857c952a01130 (patch)
tree43970a0ff46d32b8cad45b1dc3f3ca638e04fc5e /dts/src/arm/r9a06g032.dtsi
parent610797b376e65475f7aed1218a085ff8701da474 (diff)
downloadbarebox-b01786baa849369ff2345c51e63857c952a01130.tar.gz
barebox-b01786baa849369ff2345c51e63857c952a01130.tar.xz
dts: update to v5.18-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/r9a06g032.dtsi')
-rw-r--r--dts/src/arm/r9a06g032.dtsi27
1 files changed, 27 insertions, 0 deletions
diff --git a/dts/src/arm/r9a06g032.dtsi b/dts/src/arm/r9a06g032.dtsi
index c47896e4ab..636a6ab31c 100644
--- a/dts/src/arm/r9a06g032.dtsi
+++ b/dts/src/arm/r9a06g032.dtsi
@@ -66,6 +66,22 @@
interrupt-parent = <&gic>;
ranges;
+ wdt0: watchdog@40008000 {
+ compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt";
+ reg = <0x40008000 0x1000>;
+ interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>;
+ status = "disabled";
+ };
+
+ wdt1: watchdog@40009000 {
+ compatible = "renesas,r9a06g032-wdt", "renesas,rzn1-wdt";
+ reg = <0x40009000 0x1000>;
+ interrupts = <GIC_SPI 74 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&sysctrl R9A06G032_CLK_WATCHDOG>;
+ status = "disabled";
+ };
+
sysctrl: system-controller@4000c000 {
compatible = "renesas,r9a06g032-sysctrl";
reg = <0x4000c000 0x1000>;
@@ -173,6 +189,17 @@
status = "okay";
};
+ nand_controller: nand-controller@40102000 {
+ compatible = "renesas,r9a06g032-nandc", "renesas,rzn1-nandc";
+ reg = <0x40102000 0x2000>;
+ interrupts = <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&sysctrl R9A06G032_HCLK_NAND>, <&sysctrl R9A06G032_CLK_NAND>;
+ clock-names = "hclk", "eclk";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
gic: interrupt-controller@44101000 {
compatible = "arm,gic-400", "arm,cortex-a7-gic";
interrupt-controller;