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authorSascha Hauer <s.hauer@pengutronix.de>2016-06-13 07:29:57 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2016-06-13 07:29:57 +0200
commita4f4bc65b33164eb8c19bcff9834cc87bcc845bb (patch)
treeef97762be5b614f160e9affddd1bbbec43c007dc /dts/src/arm/rk3288.dtsi
parent83e61900b02965d01f0885e2db2077df35be7f56 (diff)
downloadbarebox-a4f4bc65b33164eb8c19bcff9834cc87bcc845bb.tar.gz
dts: update to v4.6-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/rk3288.dtsi')
-rw-r--r--dts/src/arm/rk3288.dtsi50
1 files changed, 49 insertions, 1 deletions
diff --git a/dts/src/arm/rk3288.dtsi b/dts/src/arm/rk3288.dtsi
index 8ac49f3..31f7e20 100644
--- a/dts/src/arm/rk3288.dtsi
+++ b/dts/src/arm/rk3288.dtsi
@@ -134,7 +134,7 @@
};
amba {
- compatible = "arm,amba-bus";
+ compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
@@ -145,6 +145,7 @@
interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
+ arm,pl330-broken-no-flushp;
clocks = <&cru ACLK_DMAC2>;
clock-names = "apb_pclk";
};
@@ -155,6 +156,7 @@
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
+ arm,pl330-broken-no-flushp;
clocks = <&cru ACLK_DMAC1>;
clock-names = "apb_pclk";
status = "disabled";
@@ -166,6 +168,7 @@
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>;
#dma-cells = <1>;
+ arm,pl330-broken-no-flushp;
clocks = <&cru ACLK_DMAC1>;
clock-names = "apb_pclk";
};
@@ -630,6 +633,9 @@
#address-cells = <1>;
#size-cells = <0>;
+ assigned-clocks = <&cru SCLK_EDP_24M>;
+ assigned-clock-parents = <&xin24m>;
+
/*
* Note: Although SCLK_* are the working clocks
* of device without including on the NOC, needed for
@@ -815,6 +821,10 @@
reg = <0>;
remote-endpoint = <&hdmi_in_vopb>;
};
+ vopb_out_mipi: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&mipi_in_vopb>;
+ };
};
};
@@ -848,6 +858,10 @@
reg = <0>;
remote-endpoint = <&hdmi_in_vopl>;
};
+ vopl_out_mipi: endpoint@2 {
+ reg = <2>;
+ remote-endpoint = <&mipi_in_vopl>;
+ };
};
};
@@ -861,6 +875,37 @@
status = "disabled";
};
+ mipi_dsi: mipi@ff960000 {
+ compatible = "rockchip,rk3288-mipi-dsi", "snps,dw-mipi-dsi";
+ reg = <0xff960000 0x4000>;
+ interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_MIPI_DSI0>;
+ clock-names = "ref", "pclk";
+ rockchip,grf = <&grf>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ mipi_in: port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ mipi_in_vopb: endpoint@0 {
+ reg = <0>;
+ remote-endpoint = <&vopb_out_mipi>;
+ };
+ mipi_in_vopl: endpoint@1 {
+ reg = <1>;
+ remote-endpoint = <&vopl_out_mipi>;
+ };
+ };
+ };
+ };
+
hdmi: hdmi@ff980000 {
compatible = "rockchip,rk3288-dw-hdmi";
reg = <0xff980000 0x20000>;
@@ -926,6 +971,7 @@
reg = <0x320>;
clocks = <&cru SCLK_OTGPHY0>;
clock-names = "phyclk";
+ #clock-cells = <0>;
};
usbphy1: usb-phy1 {
@@ -933,6 +979,7 @@
reg = <0x334>;
clocks = <&cru SCLK_OTGPHY1>;
clock-names = "phyclk";
+ #clock-cells = <0>;
};
usbphy2: usb-phy2 {
@@ -940,6 +987,7 @@
reg = <0x348>;
clocks = <&cru SCLK_OTGPHY2>;
clock-names = "phyclk";
+ #clock-cells = <0>;
};
};