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authorSascha Hauer <s.hauer@pengutronix.de>2014-10-21 13:11:04 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2014-10-21 13:11:04 +0200
commit604ad71929a1deabe77b7ab9c3655d82002d79c9 (patch)
tree8640b00b7d9945560f3b31dd3efd947f08d0d319 /dts/src/arm/socfpga_cyclone5.dtsi
parent826d399c448b4e08d73731448d0400c449e9fc58 (diff)
downloadbarebox-604ad71929a1deabe77b7ab9c3655d82002d79c9.tar.gz
barebox-604ad71929a1deabe77b7ab9c3655d82002d79c9.tar.xz
dts: update to v3.18-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm/socfpga_cyclone5.dtsi')
-rw-r--r--dts/src/arm/socfpga_cyclone5.dtsi13
1 files changed, 6 insertions, 7 deletions
diff --git a/dts/src/arm/socfpga_cyclone5.dtsi b/dts/src/arm/socfpga_cyclone5.dtsi
index bf51182872..28c05e7a31 100644
--- a/dts/src/arm/socfpga_cyclone5.dtsi
+++ b/dts/src/arm/socfpga_cyclone5.dtsi
@@ -16,6 +16,8 @@
*/
/dts-v1/;
+/* First 4KB has trampoline code for secondary cores. */
+/memreserve/ 0x00000000 0x0001000;
#include "socfpga.dtsi"
/ {
@@ -28,15 +30,12 @@
};
};
- dwmmc0@ff704000 {
+ mmc0: dwmmc0@ff704000 {
num-slots = <1>;
- supports-highspeed;
broken-cd;
-
- slot@0 {
- reg = <0>;
- bus-width = <4>;
- };
+ bus-width = <4>;
+ cap-mmc-highspeed;
+ cap-sd-highspeed;
};
ethernet@ff702000 {