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authorSascha Hauer <s.hauer@pengutronix.de>2018-02-27 09:40:19 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2018-03-01 14:29:51 +0100
commita9c5f6b9ec883ee9dafd6d393600acc6fd263043 (patch)
tree35621cff332a0c95509b04b2e4170f0eda1f0ecf /dts/src/arm64/exynos/exynos5433-tm2-common.dtsi
parent5ba0e42cb24afdf59d48930daf495c148312fc67 (diff)
downloadbarebox-a9c5f6b9ec883ee9dafd6d393600acc6fd263043.tar.gz
barebox-a9c5f6b9ec883ee9dafd6d393600acc6fd263043.tar.xz
dts: update to v4.16-rc1
Also includeded: ARM: dts: am33xx: do not delete no longer existing clocks Several clocks are removed from the am33xx dts files with v4.16-rc1. Remove the corresponding /delete-node/ directives aswell to avoid dtc breakage. Also included: ARM: dts: imx6qdl: SolidRun: Fix upstream include Upstream dts file way renamed, so change include name accordingly. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/exynos/exynos5433-tm2-common.dtsi')
-rw-r--r--dts/src/arm64/exynos/exynos5433-tm2-common.dtsi19
1 files changed, 15 insertions, 4 deletions
diff --git a/dts/src/arm64/exynos/exynos5433-tm2-common.dtsi b/dts/src/arm64/exynos/exynos5433-tm2-common.dtsi
index 297597442c..a77462da4a 100644
--- a/dts/src/arm64/exynos/exynos5433-tm2-common.dtsi
+++ b/dts/src/arm64/exynos/exynos5433-tm2-common.dtsi
@@ -1,3 +1,4 @@
+// SPDX-License-Identifier: GPL-2.0
/*
* SAMSUNG Exynos5433 TM2 board device tree source
*
@@ -5,10 +6,6 @@
*
* Common device tree source file for Samsung's TM2 and TM2E boards
* which are based on Samsung Exynos5433 SoC.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
/dts-v1/;
@@ -741,6 +738,19 @@
};
};
+&hsi2c_4 {
+ status = "okay";
+
+ s3fwrn5: nfc@27 {
+ compatible = "samsung,s3fwrn5-i2c";
+ reg = <0x27>;
+ interrupt-parent = <&gpa1>;
+ interrupts = <3 IRQ_TYPE_LEVEL_HIGH>;
+ s3fwrn5,en-gpios = <&gpf1 4 GPIO_ACTIVE_HIGH>;
+ s3fwrn5,fw-gpios = <&gpj0 2 GPIO_ACTIVE_HIGH>;
+ };
+};
+
&hsi2c_5 {
status = "okay";
@@ -756,6 +766,7 @@
&hsi2c_7 {
status = "okay";
+ clock-frequency = <1000000>;
sii8620@39 {
reg = <0x39>;