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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-11-09 12:38:26 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-11-09 13:42:10 +0100 |
| commit | 119c632f12509eab4bc58daf629c4b16fffcedca (patch) | |
| tree | 34366b3095d957178b46be47f628a3926ad35ac3 /dts/src/arm64/freescale/fsl-ls1046a.dtsi | |
| parent | 89b766c63f94b5fe94db75a6f197c9e6c0f9da7e (diff) | |
| download | barebox-119c632f12509eab4bc58daf629c4b16fffcedca.tar.gz barebox-119c632f12509eab4bc58daf629c4b16fffcedca.tar.xz | |
dts: update to v5.10-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/freescale/fsl-ls1046a.dtsi')
| -rw-r--r-- | dts/src/arm64/freescale/fsl-ls1046a.dtsi | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/dts/src/arm64/freescale/fsl-ls1046a.dtsi b/dts/src/arm64/freescale/fsl-ls1046a.dtsi index 0246d975a2..1fa39bacff 100644 --- a/dts/src/arm64/freescale/fsl-ls1046a.dtsi +++ b/dts/src/arm64/freescale/fsl-ls1046a.dtsi @@ -1,9 +1,9 @@ // SPDX-License-Identifier: (GPL-2.0+ OR MIT) /* - * Device Tree Include file for Freescale Layerscape-1046A family SoC. + * Device Tree Include file for NXP Layerscape-1046A family SoC. * * Copyright 2016 Freescale Semiconductor, Inc. - * Copyright 2018 NXP + * Copyright 2018, 2020 NXP * * Mingkai Hu <mingkai.hu@nxp.com> */ @@ -718,7 +718,7 @@ <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; }; - pcie@3400000 { + pcie1: pcie@3400000 { compatible = "fsl,ls1046a-pcie"; reg = <0x00 0x03400000 0x0 0x00100000 /* controller registers */ 0x40 0x00000000 0x0 0x00002000>; /* configuration space */ @@ -744,7 +744,7 @@ status = "disabled"; }; - pcie_ep@3400000 { + pcie_ep1: pcie_ep@3400000 { compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep"; reg = <0x00 0x03400000 0x0 0x00100000 0x40 0x00000000 0x8 0x00000000>; @@ -754,7 +754,7 @@ status = "disabled"; }; - pcie@3500000 { + pcie2: pcie@3500000 { compatible = "fsl,ls1046a-pcie"; reg = <0x00 0x03500000 0x0 0x00100000 /* controller registers */ 0x48 0x00000000 0x0 0x00002000>; /* configuration space */ @@ -780,7 +780,7 @@ status = "disabled"; }; - pcie_ep@3500000 { + pcie_ep2: pcie_ep@3500000 { compatible = "fsl,ls1046a-pcie-ep","fsl,ls-pcie-ep"; reg = <0x00 0x03500000 0x0 0x00100000 0x48 0x00000000 0x8 0x00000000>; @@ -790,7 +790,7 @@ status = "disabled"; }; - pcie@3600000 { + pcie3: pcie@3600000 { compatible = "fsl,ls1046a-pcie"; reg = <0x00 0x03600000 0x0 0x00100000 /* controller registers */ 0x50 0x00000000 0x0 0x00002000>; /* configuration space */ @@ -816,7 +816,7 @@ status = "disabled"; }; - pcie_ep@3600000 { + pcie_ep3: pcie_ep@3600000 { compatible = "fsl,ls1046a-pcie-ep", "fsl,ls-pcie-ep"; reg = <0x00 0x03600000 0x0 0x00100000 0x50 0x00000000 0x8 0x00000000>; |