diff options
author | Sascha Hauer <s.hauer@pengutronix.de> | 2016-09-29 14:38:07 +0200 |
---|---|---|
committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-09-29 14:38:07 +0200 |
commit | d9a15385467936649b6c2cfeb7ab377002ddce0f (patch) | |
tree | 39175107fc884a29fbba83f47d104f493833fe19 /dts/src/arm64/freescale/fsl-ls2080a.dtsi | |
parent | bfe946c9593513b0ad1b440bcd997b263487b945 (diff) | |
download | barebox-d9a15385467936649b6c2cfeb7ab377002ddce0f.tar.gz barebox-d9a15385467936649b6c2cfeb7ab377002ddce0f.tar.xz |
dts: update to v4.8-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/freescale/fsl-ls2080a.dtsi')
-rw-r--r-- | dts/src/arm64/freescale/fsl-ls2080a.dtsi | 44 |
1 files changed, 35 insertions, 9 deletions
diff --git a/dts/src/arm64/freescale/fsl-ls2080a.dtsi b/dts/src/arm64/freescale/fsl-ls2080a.dtsi index 3187c822af..21023a388c 100644 --- a/dts/src/arm64/freescale/fsl-ls2080a.dtsi +++ b/dts/src/arm64/freescale/fsl-ls2080a.dtsi @@ -51,7 +51,7 @@ #size-cells = <2>; cpus { - #address-cells = <2>; + #address-cells = <1>; #size-cells = <0>; /* @@ -65,57 +65,81 @@ cpu@0 { device_type = "cpu"; compatible = "arm,cortex-a57"; - reg = <0x0 0x0>; + reg = <0x0>; clocks = <&clockgen 1 0>; + next-level-cache = <&cluster0_l2>; }; cpu@1 { device_type = "cpu"; compatible = "arm,cortex-a57"; - reg = <0x0 0x1>; + reg = <0x1>; clocks = <&clockgen 1 0>; + next-level-cache = <&cluster0_l2>; }; cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a57"; - reg = <0x0 0x100>; + reg = <0x100>; clocks = <&clockgen 1 1>; + next-level-cache = <&cluster1_l2>; }; cpu@101 { device_type = "cpu"; compatible = "arm,cortex-a57"; - reg = <0x0 0x101>; + reg = <0x101>; clocks = <&clockgen 1 1>; + next-level-cache = <&cluster1_l2>; }; cpu@200 { device_type = "cpu"; compatible = "arm,cortex-a57"; - reg = <0x0 0x200>; + reg = <0x200>; clocks = <&clockgen 1 2>; + next-level-cache = <&cluster2_l2>; }; cpu@201 { device_type = "cpu"; compatible = "arm,cortex-a57"; - reg = <0x0 0x201>; + reg = <0x201>; clocks = <&clockgen 1 2>; + next-level-cache = <&cluster2_l2>; }; cpu@300 { device_type = "cpu"; compatible = "arm,cortex-a57"; - reg = <0x0 0x300>; + reg = <0x300>; clocks = <&clockgen 1 3>; + next-level-cache = <&cluster3_l2>; }; cpu@301 { device_type = "cpu"; compatible = "arm,cortex-a57"; - reg = <0x0 0x301>; + reg = <0x301>; clocks = <&clockgen 1 3>; + next-level-cache = <&cluster3_l2>; + }; + + cluster0_l2: l2-cache0 { + compatible = "cache"; + }; + + cluster1_l2: l2-cache1 { + compatible = "cache"; + }; + + cluster2_l2: l2-cache2 { + compatible = "cache"; + }; + + cluster3_l2: l2-cache3 { + compatible = "cache"; }; }; @@ -672,6 +696,7 @@ interrupts = <0 80 0x4>; /* Level high type */ dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; }; usb1: usb3@3110000 { @@ -681,6 +706,7 @@ interrupts = <0 81 0x4>; /* Level high type */ dr_mode = "host"; snps,quirk-frame-length-adjustment = <0x20>; + snps,dis_rxdet_inp3_quirk; }; ccn@4000000 { |