diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2020-12-01 08:38:38 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-12-01 08:38:38 +0100 |
| commit | ceb40fbbb177693257e5f32fef066aa3ee65f6af (patch) | |
| tree | 6255157f321c143f575b0d6e5bebc8a6ba6e8d22 /dts/src/arm64/freescale/imx8mm-var-som.dtsi | |
| parent | 7dddc34a722829ea7703966f23590ed8ea2b7e91 (diff) | |
| download | barebox-ceb40fbbb177693257e5f32fef066aa3ee65f6af.tar.gz barebox-ceb40fbbb177693257e5f32fef066aa3ee65f6af.tar.xz | |
dts: update to v5.10-rc5
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/freescale/imx8mm-var-som.dtsi')
| -rw-r--r-- | dts/src/arm64/freescale/imx8mm-var-som.dtsi | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/dts/src/arm64/freescale/imx8mm-var-som.dtsi b/dts/src/arm64/freescale/imx8mm-var-som.dtsi index 4107fe914d..4908252976 100644 --- a/dts/src/arm64/freescale/imx8mm-var-som.dtsi +++ b/dts/src/arm64/freescale/imx8mm-var-som.dtsi @@ -135,13 +135,10 @@ pmic@4b { compatible = "rohm,bd71847"; reg = <0x4b>; + pinctrl-names = "default"; pinctrl-0 = <&pinctrl_pmic>; interrupt-parent = <&gpio2>; - /* - * The interrupt is not correct. It should be level low, - * however with internal pull up this causes IRQ storm. - */ - interrupts = <8 IRQ_TYPE_EDGE_RISING>; + interrupts = <8 IRQ_TYPE_LEVEL_LOW>; rohm,reset-snvs-powered; #clock-cells = <0>; @@ -398,7 +395,7 @@ pinctrl_pmic: pmicirqgrp { fsl,pins = < - MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x41 + MX8MM_IOMUXC_SD1_DATA6_GPIO2_IO8 0x141 >; }; |