diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2022-04-12 10:22:44 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-04-14 09:33:24 +0200 |
| commit | b01786baa849369ff2345c51e63857c952a01130 (patch) | |
| tree | 43970a0ff46d32b8cad45b1dc3f3ca638e04fc5e /dts/src/arm64/intel | |
| parent | 610797b376e65475f7aed1218a085ff8701da474 (diff) | |
| download | barebox-b01786baa849369ff2345c51e63857c952a01130.tar.gz barebox-b01786baa849369ff2345c51e63857c952a01130.tar.xz | |
dts: update to v5.18-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/intel')
| -rw-r--r-- | dts/src/arm64/intel/socfpga_agilex.dtsi | 5 | ||||
| -rw-r--r-- | dts/src/arm64/intel/socfpga_agilex_socdk.dts | 7 | ||||
| -rw-r--r-- | dts/src/arm64/intel/socfpga_agilex_socdk_nand.dts | 1 | ||||
| -rw-r--r-- | dts/src/arm64/intel/socfpga_n5x_socdk.dts | 10 |
4 files changed, 18 insertions, 5 deletions
diff --git a/dts/src/arm64/intel/socfpga_agilex.dtsi b/dts/src/arm64/intel/socfpga_agilex.dtsi index f4270cf189..c78371703e 100644 --- a/dts/src/arm64/intel/socfpga_agilex.dtsi +++ b/dts/src/arm64/intel/socfpga_agilex.dtsi @@ -300,7 +300,7 @@ status = "disabled"; }; - mmc: dwmmc0@ff808000 { + mmc: mmc@ff808000 { #address-cells = <1>; #size-cells = <0>; compatible = "altr,socfpga-dw-mshc"; @@ -337,7 +337,7 @@ reg = <0xffe00000 0x40000>; }; - pdma: pdma@ffda0000 { + pdma: dma-controller@ffda0000 { compatible = "arm,pl330", "arm,primecell"; reg = <0xffda0000 0x1000>; interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>, @@ -510,6 +510,7 @@ resets = <&rst USB0_RESET>, <&rst USB0_OCP_RESET>; reset-names = "dwc2", "dwc2-ecc"; clocks = <&clkmgr AGILEX_USB_CLK>; + clock-names = "otg"; iommus = <&smmu 6>; status = "disabled"; }; diff --git a/dts/src/arm64/intel/socfpga_agilex_socdk.dts b/dts/src/arm64/intel/socfpga_agilex_socdk.dts index 0f7a0ba344..26cd3c1217 100644 --- a/dts/src/arm64/intel/socfpga_agilex_socdk.dts +++ b/dts/src/arm64/intel/socfpga_agilex_socdk.dts @@ -6,6 +6,7 @@ / { model = "SoCFPGA Agilex SoCDK"; + compatible = "intel,socfpga-agilex-socdk", "intel,socfpga-agilex"; aliases { serial0 = &uart0; @@ -20,17 +21,17 @@ leds { compatible = "gpio-leds"; - hps0 { + led0 { label = "hps_led0"; gpios = <&portb 20 GPIO_ACTIVE_HIGH>; }; - hps1 { + led1 { label = "hps_led1"; gpios = <&portb 19 GPIO_ACTIVE_HIGH>; }; - hps2 { + led2 { label = "hps_led2"; gpios = <&portb 21 GPIO_ACTIVE_HIGH>; }; diff --git a/dts/src/arm64/intel/socfpga_agilex_socdk_nand.dts b/dts/src/arm64/intel/socfpga_agilex_socdk_nand.dts index 57f83481f5..51f83f96ec 100644 --- a/dts/src/arm64/intel/socfpga_agilex_socdk_nand.dts +++ b/dts/src/arm64/intel/socfpga_agilex_socdk_nand.dts @@ -6,6 +6,7 @@ / { model = "SoCFPGA Agilex SoCDK"; + compatible = "intel,socfpga-agilex-socdk", "intel,socfpga-agilex"; aliases { serial0 = &uart0; diff --git a/dts/src/arm64/intel/socfpga_n5x_socdk.dts b/dts/src/arm64/intel/socfpga_n5x_socdk.dts index f3c1310dae..62c66e52b6 100644 --- a/dts/src/arm64/intel/socfpga_n5x_socdk.dts +++ b/dts/src/arm64/intel/socfpga_n5x_socdk.dts @@ -6,6 +6,7 @@ / { model = "eASIC N5X SoCDK"; + compatible = "intel,n5x-socdk", "intel,socfpga-agilex"; aliases { serial0 = &uart0; @@ -23,6 +24,15 @@ /* We expect the bootloader to fill in the reg */ reg = <0 0 0 0>; }; + + soc { + sdram_edac: memory-controller@f87f8000 { + compatible = "snps,ddrc-3.80a"; + reg = <0xf87f8000 0x400>; + interrupts = <0 175 4>; + status = "okay"; + }; + }; }; &clkmgr { |