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authorSascha Hauer <s.hauer@pengutronix.de>2020-11-09 12:38:26 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2020-11-09 13:42:10 +0100
commit119c632f12509eab4bc58daf629c4b16fffcedca (patch)
tree34366b3095d957178b46be47f628a3926ad35ac3 /dts/src/arm64/mediatek/mt8183.dtsi
parent89b766c63f94b5fe94db75a6f197c9e6c0f9da7e (diff)
downloadbarebox-119c632f12509eab4bc58daf629c4b16fffcedca.tar.gz
barebox-119c632f12509eab4bc58daf629c4b16fffcedca.tar.xz
dts: update to v5.10-rc1
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'dts/src/arm64/mediatek/mt8183.dtsi')
-rw-r--r--dts/src/arm64/mediatek/mt8183.dtsi15
1 files changed, 13 insertions, 2 deletions
diff --git a/dts/src/arm64/mediatek/mt8183.dtsi b/dts/src/arm64/mediatek/mt8183.dtsi
index 102105871d..9cfd961c45 100644
--- a/dts/src/arm64/mediatek/mt8183.dtsi
+++ b/dts/src/arm64/mediatek/mt8183.dtsi
@@ -317,8 +317,7 @@
};
watchdog: watchdog@10007000 {
- compatible = "mediatek,mt8183-wdt",
- "mediatek,mt6589-wdt";
+ compatible = "mediatek,mt8183-wdt";
reg = <0 0x10007000 0 0x100>;
#reset-cells = <1>;
};
@@ -339,6 +338,18 @@
clock-names = "spi", "wrap";
};
+ scp: scp@10500000 {
+ compatible = "mediatek,mt8183-scp";
+ reg = <0 0x10500000 0 0x80000>,
+ <0 0x105c0000 0 0x19080>;
+ reg-names = "sram", "cfg";
+ interrupts = <GIC_SPI 174 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&infracfg CLK_INFRA_SCPSYS>;
+ clock-names = "main";
+ memory-region = <&scp_mem_reserved>;
+ status = "disabled";
+ };
+
systimer: timer@10017000 {
compatible = "mediatek,mt8183-timer",
"mediatek,mt6765-timer";